J
Jatin Chhugani
Researcher at Intel
Publications - 81
Citations - 5008
Jatin Chhugani is an academic researcher from Intel. The author has contributed to research in topics: SIMD & Rendering (computer graphics). The author has an hindex of 28, co-authored 80 publications receiving 4728 citations. Previous affiliations of Jatin Chhugani include IBM & Johns Hopkins University.
Papers
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Proceedings ArticleDOI
Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU
Victor W. Lee,Changkyu Kim,Jatin Chhugani,Michael E. Deisher,Daehyun Kim,Anthony D. Nguyen,Nadathur Satish,Mikhail Smelyanskiy,Srinivas Chennupaty,Per Hammarlund,Ronak Singhal,Pradeep Dubey +11 more
TL;DR: This paper discusses optimization techniques for both CPU and GPU, analyzes what architecture features contributed to performance differences between the two architectures, and recommends a set of architectural features which provide significant improvement in architectural efficiency for throughput kernels.
Proceedings ArticleDOI
ClearPath: highly parallel collision avoidance for multi-agent simulation
Stephen J. Guy,Jatin Chhugani,Changkyu Kim,Nadathur Satish,Ming C. Lin,Dinesh Manocha,Pradeep Dubey +6 more
TL;DR: The approach extends the notion of velocity obstacles from robotics and formulates the conditions for collision free navigation as a quadratic optimization problem and uses a discrete optimization method to efficiently compute the motion of each agent.
Proceedings ArticleDOI
FAST: fast architecture sensitive tree search on modern CPUs and GPUs
Changkyu Kim,Jatin Chhugani,Nadathur Satish,Eric Sedlar,Anthony D. Nguyen,Tim Kaldewey,Victor W. Lee,Scott A. Brandt,Pradeep Dubey +8 more
TL;DR: FAST is an extremely fast architecture sensitive layout of the index tree logically organized to optimize for architecture features like page size, cache line size, and SIMD width of the underlying hardware, and achieves a 6X performance improvement over uncompressed index search for large keys on CPUs.
Journal ArticleDOI
Sort vs. Hash revisited: fast join implementation on modern multi-core CPUs
Changkyu Kim,Tim Kaldewey,Victor W. Lee,Eric Sedlar,Anthony D. Nguyen,Nadathur Satish,Jatin Chhugani,Andrea Di Blas,Pradeep Dubey +8 more
TL;DR: This paper re-examines two popular join algorithms to determine if the latest computer architecture trends shift the tide that has favored hash join for many years and offers multicore implementations of hash join and sort-merge join which consistently outperform all previously reported results.
Proceedings ArticleDOI
3.5-D Blocking Optimization for Stencil Computations on Modern CPUs and GPUs
TL;DR: A novel 3.