Background Pulsed electric field (PEF) is an attractive and efficient non-thermal technology that can advance functionality, extractability, and retrieval of nutritionally beneficial compounds. For industrial PEF food processing, high electric field consistency is of importance for continuous operation and an economical return-of-investment within a short period. Scope and approach The technology uptake at an industrial scale is still low due to the shortage of reliable and more practical electrical systems. Therefore, designing an application-specific and cost-effective electrical system is essential for commercial use of this novel technology. This review describes the requirements and developments of the electrical systems employed in PEF food processing. Key findings and conclusion The process parameters and control variables of the PEF system are not only critical for the designing of the electrical systems but also for the experts of the food sciences. Inadequate or insufficient description of different engineering aspects of experimental procedures is a hindrance in allowing the work to be reproduced in other laboratories. This review describes the critical process parameters and the designing methodology of the specialized equipment required in food processing as a guide for the designers and the researchers of this technology.

Electrical systems for pulsed electric field applications in the food industry: An engineering perspective

High-dielectric constant (high-k) gate oxides and low-dielectric constant (low-k) interlayer dielectrics (ILD) have dominated the nanoelectronic materials research scene over the past two decades, but they have recently reached a state of maturity and perhaps the limits of their scaling. Based on this, there is a need for a systematic review summarizing not only the historic research and achievements on high-k and low-k dielectrics, but also emerging device applications as well as an outlook of future challenges.We begin by first reviewing the factors that drove the emergence of low-k and high-k materials in nanoelectronics as ILD and gate dielectric materials, respectively, and the challenges and limits these materials ultimately approached in terms of permittivity scaling.We then illustrate that gate dielectric and ILD applications represent just a small fraction of the numerous dielectrics utilized in present day nanoelectronic products where permittivity scaling is now being increasingly demanded for materials such as dielectric spacers, trench isolation, and etch stopping layers. We conclude by examining the numerous new applications for dielectric materials that are emerging as the semiconductor industry transitions to novel patterning schemes, prepares for life post CMOS scaling, and explores ways to natively embed device functionality in the metal interconnect. For the former, we specifically examine the “colorful”requirements for the various enabling dielectric hard mask and spacer materials utilized in pitch division-multi-pattern processes and then discuss the role that selective area deposition of dielectrics and metals could play in reducing the complexity of such patterning processes. For the latter, we review the use of both high-k and low-k dielectrics in various metal-insulator-metal (MIM) structures as Fermi level de-pinning layers, tunnel diodes, and back-end-of-line (BEOL) compatible capacitive and resistive switching random access memory (ReRAM) elements.We further examine how dielectrics can hinder or aid new forms of computing such as quantum and neuromorphic in reaching their full potential. In conclusion, we find that while the field of dielectrics has a long history, it remains vibrant with numerous exciting new and old research vectors awaiting further exploration.© 2019 The Electrochemical Society.

https://iopscience.iop.org/article/10.1149/2.0161910jss/pdf

Review—Beyond the highs and lows: A perspective on the future of dielectrics research for nanoelectronic devices

The energy barrier heights between two recently reported Ta-based amorphous metals (TaWSi and TaNiSi), TaN, and atomic layer deposited Al2O3 and HfO2 insulators are measured in metal/insulator/metal (MIM) structures with Au top electrodes using internal photoemission (IPE) spectroscopy. For Al2O3, the Ta-based metal barrier heights, φBn, increase with increasing metal work function, ΦM, for TaN, TaWSi, and TaNiSi, respectively. For HfO2, however, the barrier heights are relatively constant for all three metals φBn,TaNiSi ≈ φBn.TaWSi ≈ φBn.TaN. The difference between HfO2 and Al2O3 is attributed to enhanced Fermi-level pinning due to a larger dielectric constant. The slope parameter, S, was found to be roughly 0.89 and 0.44–0.69 for Al2O3 and HfO2, respectively. For devices with a TaWSi bottom electrode, a comparison was also made between Al and Au top electrodes. Significantly, smaller barrier heights were obtained with an Au top electrode than with an Al top electrode, 0.6 eV and 0.8 eV lower for HfO2 and Al2O3, respectively. IPE energy barriers are found consistent with current-voltage asymmetry of MIM diodes, whereas Schottky model predictions of barrier heights were inconsistent.

/pdf/internal-photoemission-spectroscopy-determination-of-barrier-4og4gtko0t.pdf

Internal photoemission spectroscopy determination of barrier heights between Ta-based amorphous metals and atomic layer deposited insulators

Assessment of Energy Barriers Between ZrCuAlNi Amorphous Metal and Atomic Layer Deposition Insulators Using Internal Photoemission Spectroscopy

Metal-insulator-metal MIM devices of Al
 2
O
 3
 were annealed to various temperatures, 366, 411 and 455 K. Their capacitance measurements were conducted at room temperature. It is illustrated that the annealing process reduces the polarization nonlinearity in high DC bias fields. This way the nonlinearity can be decreased up to 75% of its initial value. Al
 2
O
 3
 was also prepared under O
 2
 atmosphere. This leads to a drastic suppression of the previously observed electrode polarization for the low frequency region and for high temperatures in the case of samples without O
 2
 treatments. With O
 2
 treatments also the nonlinearity decreases. Due to the electrode polarization the relaxational polarization of Al
 2
O
 3
 above 300 K could not be interpreted by the asymmetric double well potential (ADWP) model. It is shown that the capacitance behavior of oxygen treated samples can be interpreted in a wide temperature range by our model. Furthermore, it is found that the charge injection in the case of HfO2 and the loss are much stronger than for Al
 2
O
 3
 Preparing a composite of the two oxides this charge injection as well as the loss was highly suppressed. The composite yields a higher permittivity than that for Al2O3. The capacitance measurements are also conducted for Al
 2
O
 3
 MIM samples consisting of Pd and Au as electrodes after exposing them to hydrogen gas. These and the annealing experiments exhibit an important role of hydrogen in contributing to the relaxational polarization of metal oxides.

Role of hydrogen, oxygen and composite formation in relaxational polarization of hafnium oxide and aluminum oxide

Metals with low enthalpy of oxide formation (ΔHox) are used to examine the influence of the metal/dielectric interface, in the absence of a significant interfacial layer oxide (ILO), on the voltage nonlinearity of capacitance for metal-insulator-metal capacitors. For both atomic layer deposited Al2O3 and HfO2 dielectrics, Ag electrode devices show the lowest quadratic electric field coefficient of capacitance (αECC), followed in increasing order by Au, Pd, and Ni. The difference between the metals is greater for thinner dielectrics, which is consistent with increased influence of the interface. In addition, with decreasing dielectric thickness the quadratic voltage field coefficient of capacitance increases, whereas αECC decreases. It is proposed that the thickness dependencies are due to an interaction between vertical compression of the dielectric under an applied bias and the concomitant lateral expansion induced stress that is concentrated near the interface. Through this interaction, the metal interf...

Electrode modulated capacitance-electric field nonlinearity in metal-insulator-metal capacitors

Extrinsic impurity defect engineering is demonstrated to increase the maximum asymmetry of metal/insulator/metal (MIM) tunnel diodes. Using atomic layer deposition, transition metal Ni impurities are inserted at precise physical locations within the thickness of the insulating tunnel barrier in asymmetric electrode TiN/Al2O3/Al MIM diodes. The presence of Ni in Al2O3 is found to suppress the onset of Fowler–Nordheim tunneling from the Al electrode without changing the relative dielectric constant or refractive index of the insulator. Current–voltage asymmetry, a performance metric for MIM diodes, is reversed in Al2O3(Ni) devices and is increased over the control Al2O3 device (without Ni impurities) when the Ni impurities are placed close to the Al electrode. Capacitance–voltage measurements on MIM and metal/oxide/semiconductor devices along with Fowler–Nordheim derivative analysis all indicate the introduction of negative charge highly correlated with the position of the Ni defect layer within the Al2O3. Internal photoemission measurements show little change in zero-field energy barrier heights at the electrode interfaces, but varying field dependencies with respect to the position of the Ni defect layer. Combined results suggest that the level of the deep states introduced by the Ni atoms in Al2O3 is consistent with DFT predictions for the corundum Al2O3 system. Overall, this work demonstrates the possibility of improving MIM diode performance using precisely placed extrinsic defects.

John F. ConleyJr.

Papers

Electrode modulated capacitance-electric field nonlinearity in metal-insulator-metal capacitors

Precision defect engineering of metal/insulator/metal diodes using atomic layer deposition to localize Ni impurities in Al2O3 tunnel barriers