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Showing papers by "John W. Palmour published in 2005"


Journal ArticleDOI
TL;DR: In this paper, a 2.5 mW-cm2 4H-SiC power DMOSFET with a device area of 2.1 mm x 2. 1 mm has been demonstrated.
Abstract: Due to the high critical field in 4H-SiC, the drain charge and switching loss densities in a SiC power device are approximately 10X higher than that of a silicon device. However, for the same voltage and resistance ratings, the device area is much smaller for the 4H-SiC device. Therefore, the total drain charge and switching losses are much lower for the 4H-SiC power device. A 2.3 kV, 13.5 mW-cm2 4H-SiC power DMOSFET with a device area of 2.1 mm x 2.1 mm has been demonstrated. The device showed a stable avalanche at a drain bias of 2.3 kV, and an on-current of 5 A with a VGS of 20 V and a VDS of 2.6 V. Approximately an order of magnitude lower parasitic capacitance values, as compared to those of commercially available silicon power MOSFETs, were measured for the 4H-SiC power DMOSFET. This suggests that the 4H-SiC DMOSFET can provide an order of magnitude improvement in switching performance in high speed switching applications.

27 citations


Journal ArticleDOI
TL;DR: In this paper, an integrated Darlington pair with an active area of 3 mm x 3 mm showed a collector current of 30 A at a forward voltage drop of 4 V at room temperature.
Abstract: 1000 V Bipolar Junction Transistor and integrated Darlington pairs with high current gain have been developed in 4H-SiC. The 3.38 mm x 3.38 mm BJT devices with an active area of 3 mm x 3 mm showed a forward on-current of 30 A, which corresponds to a current density of 333 A/cm2, at a forward voltage drop of 2 V. A common-emitter current gain of 40 was measured on these devices. A specific on-resistance of 6.0 mW-cm2 was observed at room temperature. The onresistance increases at higher temperatures, while the current gain decreases to 30 at 275°C. In addition, an integrated Darlington pair with an active area of 3 mm x 3 mm showed a collector current of 30 A at a forward drop of 4 V at room temperature. A current gain of 2400 was measured on these devices. A BVCEO of 1000 V was measured on both of these devices.

12 citations


Journal ArticleDOI
TL;DR: In this article, a survey of the most important factors relating to an epitaxial SiC growth process that is suitable for bipolar power devices is presented, including epilayer uniformity and extended defect density.
Abstract: We present a survey of the most important factors relating to an epitaxial SiC growth process that is suitable for bipolar power devices. During the last several years, we have advanced our hot-wall SiC epitaxial growth technology to the point that we can support the transition of bipolar power devices from demonstrations to applications. Two major concerns in developing a suitable epitaxial technology are epilayer uniformity and extended defect density. Our state-of-theart capability permits the realization of 1-cm2 area devices with exceptional yields. Another major concern is the stability of bipolar devices during forward conduction. We have developed proprietary substrate and epilayer preparation technologies that have essentially eliminated Vf drift as a significant barrier to the exploitation of SiC based bipolar devices.

9 citations


Patent
16 May 2005
TL;DR: In this paper, a semiconductor device is described that includes at least one surface, a control contact on the surface for controlling the electrical response of the semiconductor material, a dielectric barrier layer covering at least a portion of the one surface adjacent the control contact, and a polygonal mesh covering the remainder of the Group III nitride surface.
Abstract: A semiconductor device is disclosed that includes a layer of Group III nitride semiconductor material that includes at least one surface, a control contact on the surface for controlling the electrical response of the semiconductor material, a dielectric barrier layer covering at least a portion of the one surface adjacent the control contact, the dielectric barrier layer having a bandgap greater than the bandgap of the Group III nitride and a conduction band offset from the conduction band of the Group III nitride, and a dielectric protective layer covering the remainder of the Group III nitride surface.

7 citations


Proceedings ArticleDOI
23 May 2005
TL;DR: In this article, a PWM half bridge inverter was built by using a couple of SICGT modules, which achieved an output power of 20 kVA at V DC of 2kV and carrier frequency of 2kHz, this represents the largest output power among the reported SiC inverters.
Abstract: 4.5kV 60A SICGT of 6mm times 6mm chip size has been developed, which has the largest electric power handling capability among the reported SiC switching devices. Due to the fast turn-on time of 0.08mus and the fast turn-off time of 2.3mus at 250degC, SICGT can realize a low power loss as compared with 4.5kV Si GTOs and 4.5W Si IGBTs. A PWM half bridge inverter was built by using a couple of SICGT modules. Each module consists of one SICGT and two SiC pn diodes in a TO3 type package. The inverter achieved an output power of 20 kVA at V DC of 2kV and carrier frequency of 2kHz, This represents the largest output power among the reported SiC inverters

2 citations


Journal ArticleDOI
TL;DR: In this article, the effects of minority carrier lifetime in diode no-base and injection coefficient of p+-emitter are investigated with respect to device performance at high injection levels, and reverse current recovery and post-injection voltage decay are measured for high voltage 4H-SiC p+non+-diodes.
Abstract: Forward current-voltage characteristics, reverse current recovery and post-injection voltage decay are measured for high voltage 4H-SiC p+non+-diodes. The effects of both minority carrier lifetime in diode no-base and injection coefficient of p+-emitter are investigated with respect to device performance at high injection levels.

1 citations