The international technology roadmap of semiconductors (ITRS) is approaching the historical end point and we observe that the semiconductor industry is driving complementary metal oxide semiconductor (CMOS) further towards unknown zones. Today's transistors with 3D structure and integrated advanced strain engineering differ radically from the original planar 2D ones due to the scaling down of the gate and source/drain regions according to Moore's law. This article presents a review of new architectures, simulation methods, and process technology for nano-scale transistors on the approach to the end of ITRS technology. The discussions cover innovative methods, challenges and difficulties in device processing, as well as new metrology techniques that may appear in the near future.

State of the Art and Future Perspectives in Advanced CMOS Technology.

We report a new atomic layer deposition (ALD) process for nickel carbide (Ni3C). The process uses bis(1,4-di-tert-butyl-1,3-diazabutadienyl)nickel(II) and H2 plasma and is able to produce smooth, pure, crystalline Ni3C thin films in an ideal self-limiting ALD growth fashion. Using this ALD process, a uniform thin layer of Ni3C can be conformally coated on carbon nanotubes (CNTs) to afford a core–shell nanostructured Ni3C/CNT composite. The ALD-prepared Ni3C/CNT composite is demonstrated to show excellent performance for supercapacitors and electrocatalytic hydrogen evolution.

Atomic layer deposition of nickel carbide for supercapacitors and electrocatalytic hydrogen evolution

When the international technology roadmap of semiconductors (ITRS) started almost five decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) continuously miniaturized. The transistor structure has radically changed from its original planar 2D architecture to today’s 3D Fin field-effect transistors (FinFETs) along with new designs for gate and source/drain regions and applying strain engineering. This article presents how the MOSFET structure and process have been changed (or modified) to follow the More Moore strategy. A focus has been on methodologies, challenges, and difficulties when ITRS approaches the end. The discussions extend to new channel materials beyond the Moore era.

Miniaturization of CMOS.

The coating of complex three-dimensional structures with ultrathin metal films is of great interest for current technical applications, particularly in microelectronics, as well as for basic research on, for example, photonics or spintronics. While atomic layer deposition (ALD) has become a well-established fabrication method for thin oxide films on such geometries, attempts to develop ALD processes for elemental metal films have met with only mixed success. This can be understood by the lack of suitable precursors for many metals, the difficulty in reducing the metal cations to the metallic state, and the nature of metals as such, in particular their tendency to agglomerate to isolated islands. In this review, we will discuss these three challenges in detail for the example of Cu, for which ALD has been studied extensively due to its importance for microelectronic fabrication processes. Moreover, we give a comprehensive overview over metal ALD, ranging from a short summary of the early research on the ALD of the platinoid metals, which has meanwhile become an established technology, to very recent developments that target the ALD of electropositive metals. Finally, we discuss the most important applications of metal ALD.

Atomic layer deposition of metals: Precursors and film growth

A versatile two-dimensional (2D) molecular bilayer heterostructure of asymmetric MXene/monolayer transition metal dichalcogenide (aMXene/mTMDC) with a high interfacial built-in electric field is here simulated, where aMXene is an aMXene with the top or bottom electronegative atom plane of MXene removed. The asymmetric structural design of aMXene leads to a high dipole moment perpendicular to the 2D molecular plane. Although the unpassivated metal atoms in the aMXene are unstable and electropositive, coupling them to the electronegative chalcogenide atoms in an aMXene/mTMDC bilayer resolves this deficiency. The dipole field tunable by the specific composition of aMXene/mTMDC is leveraged to engineer unusual band structures, band alignments, and charge redistribution/injection in the bilayer. The simulated design of several aMXene/mTMDC bilayers for possible use in spintronics, microelectronics/optoelectronics, and catalysis/photocatalysis are shown.

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Asymmetric MXene/monolayer transition metal dichalcogenide heterostructures for functional applications

The effective work function (eWF) of Al-doped titanium carbide (TiAlC) metal electrodes prepared by atomic layer deposition shows a strong dependence on the underlying gate dielectrics. The eWF of TiAlC on HfO2 shows a low value of 4.2 eV independent of the deposition temperature and process conditions, whereas that on SiO2 shifted to a midgap value of 4.7 eV, and it was sensitive to the process conditions. The mechanism underlying this TiAlC work function dependence on different gate dielectrics is investigated in detail.

The Work Function Behavior of Aluminum-Doped Titanium Carbide Grown by Atomic Layer Deposition

Nickel germanide (NiGe) was formed from atomic layer deposition (ALD) Ni on Ge and a subequent annealing process; the Ni film with low resistivity ( $34~\mu \Omega \cdot \text {cm}$ ) at 15 nm was obtained by N2 + H2 plasma treatment after Ni precursor injection. The formed NiGe film showed low specific contact resistivity ( $\rho _{c})$ values of 9.01 $\mu \Omega \cdot \text {cm}^{2}$ for an NiGe/n+Ge contact and 3.61 $\mu \Omega \cdot \text {cm}^{2}$ for an NiGe/p+Ge contact. These values were comparable to those obtained using sputtered Ni. In addition, the ALD process-based NiGe showed excellent thermal/electrical stability up to 600 °C.

Formation of Low-Resistivity Nickel Germanide Using Atomic Layer Deposited Nickel Thin Film

Erbium carbide (ErC2) prepared by atomic layer deposition (ALD) is successfully demonstrated for the first time as a novel work function (WF) metal for nMOSFET applications The prepared ErC2 shows a very low effective WF (eWF), as low as 39 eV on HfO2, yet with excellent thermal stability In addition, it did not show significant Fermi-level pinning on high- $k$ dielectrics even after high-temperature annealing The low eWF property of ErC2 originates from the properties of the lanthanide family, while its good thermal stability is attributed to the properties of metal carbides ALD-ErC2 has superior conformality over other deposition methods, and thus is a strong candidate for 3-D structure devices

Very Low-Work-Function ALD-Erbium Carbide (ErC 2 ) Metal Electrode on High- $K$ Dielectrics

The fluorine (F) effect originating from the chemical vapor deposited (CVD) tungsten (W) process on charge-trap flash memory devices was systematically investigated, and the CVD-W memory was compared with physical vapor deposited (PVD) W memory. The residual F in the CVD-W diffused into Al2O3 and Si3N4 layers, generating shallow charge-trapping sites in each layer. These generated charge-trapping sites were considered to be responsible for the fast-erase and poor-retention characteristics at room temperature in the CVD-W compared to the related characteristics in the PVD-W memory. The generation of charge-trapping sites caused by the residual F in each layer was also supported by the trap density calculation in the Si3N4 and constant current stress test for the Al2O3 layer.

Fluorine Effects Originating From the CVD-W Process on Charge-Trap Flash Memory Cells

The use of a GeO 2 interfacial layer (IL) between a high-k dielectric and a Ge substrate helps to reduce the interface state density in Ge MOS devices. We report that the presence of the GeO 2 IL changes the effective work function (eWF) of the gate stack when annealed after high-k dielectric deposition. The eWF is reduced from 4.31 eV to 3.98 eV for TaN and from 5.00 eV to 4.44 eV for Ni. Consequently, the threshold voltage ( V th ) decreases from 0.69 V to 0.21 V for Ni after post deposition annealing. Our investigation confirms that the generation of oxygen vacancies in the GeO 2 IL near the Ge substrate is the main cause of the eWF modulation. In addition, the reliability of the GeO 2 IL is investigated via the conductance method and a constant-current stress test.

Jungmin Moon

Papers

The Work Function Behavior of Aluminum-Doped Titanium Carbide Grown by Atomic Layer Deposition

Formation of Low-Resistivity Nickel Germanide Using Atomic Layer Deposited Nickel Thin Film

Very Low-Work-Function ALD-Erbium Carbide (ErC 2 ) Metal Electrode on High- $K$ Dielectrics

Fluorine Effects Originating From the CVD-W Process on Charge-Trap Flash Memory Cells

Lowering the effective work function via oxygen vacancy formation on the GeO2/Ge interface