L
Luis A. Plana
Researcher at University of Manchester
Publications - 85
Citations - 4056
Luis A. Plana is an academic researcher from University of Manchester. The author has contributed to research in topics: Asynchronous communication & Spiking neural network. The author has an hindex of 23, co-authored 85 publications receiving 3438 citations. Previous affiliations of Luis A. Plana include Columbia University.
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Journal ArticleDOI
The SpiNNaker Project
TL;DR: SpiNNaker as discussed by the authors is a massively parallel million-core computer whose interconnect architecture is inspired by the connectivity characteristics of the mammalian brain, and which is suited to the modeling of large-scale spiking neural networks in biological real time.
Journal ArticleDOI
Overview of the SpiNNaker System Architecture
Steve Furber,David Lester,Luis A. Plana,Jim Garside,Eustace Painkras,Steve Temple,Andrew Brown +6 more
TL;DR: Three of the principal axioms of parallel machine design (memory coherence, synchronicity, and determinism) have been discarded in the design without, surprisingly, compromising the ability to perform meaningful computations.
Journal ArticleDOI
SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation
Eustace Painkras,Luis A. Plana,Jim Garside,Steve Temple,Francesco Galluppi,Cameron Patterson,David Lester,Andrew Brown,Steve Furber +8 more
TL;DR: The design requirements for the very demanding target application, the SpiNNaker micro-architecture, are reviewed and the chips are fully operational and meet their power and performance requirements.
Proceedings ArticleDOI
SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor
M.M. Khan,David Lester,Luis A. Plana,Alexander D. Rast,Xin Jin,Eustace Painkras,Steve Furber +6 more
TL;DR: The methods by which neural networks are mapped onto the system, and how features designed into the chip are to be exploited in practice are described to ensure that, when the chip is delivered, it will work as anticipated.
Journal ArticleDOI
A GALS Infrastructure for a Massively Parallel Multiprocessor
TL;DR: This case study focuses on a massively parallel multiprocessor for real-time simulation of billions of neurons that decouples clocking concerns for different parts of the die, leading to greater power efficiency.