"Extreme environments" represents an important niche market for electronics and spans the operation of electronic components in surroundings lying outside the domain of conventional commercial, or even military, specifications. Such extreme environments would include, for instance, operation to very low temperatures (e.g., to 77 K or even 4.2 K), operation at very high temperatures (e.g., to 200/spl deg/C or even 300/spl deg/C), and operation in a radiation-rich environment (e.g., space). We argue that the unique bandgap-engineered features of silicon-germanium heterojunction bipolar transistors offer great potential to simultaneously satisfy all three extreme environment applications, potentially with little or no process modification, ultimately providing compelling cost advantages at the IC and system level.

On the Potential of SiGe HBTs for Extreme Environment Electronics

This paper provides evidence that, as a result of constant-field scaling, the peak f T (approx. 0.3 mA/μm), peak f MAX (approx. 0.2 mA/μm), and optimum noise figure NF MIN (approx. 0.15 mA/pm) current densities of Si and SOI n-channel MOSFETs are largely unchanged over technology nodes and foundries. It is demonstrated that the characteristic current densities also remain invariant for the most common circuit topologies such as MOSFET cascodes, MOS-SiGe HBT cascodes, current-mode logic (CML) gates, and nMOS transimpedance amplifiers (TIAs) with active pMOSFET loads. As a consequence, it is proposed that constant current-density biasing schemes be applied to MOSFET analog/mixed-signal/RF and high-speed digital circuit design. This will alleviate the problem of ever-diminishing effective gate voltages as CMOS is scaled below 90 nm, and will reduce the impact of statistical process variation, temperature and bias current variation on circuit performance. The second half of the paper illustrates that constant current-density biasing allows for the porting of SiGe BiCMOS cascode operational amplifiers, low-noise CMOS TIAs, and MOS-CML and BiCMOS-CML logic gates and output drivers between technology nodes and foundries, and even from bulk CMOS to SOI processes, with little or no redesign. Examples are provided of several record-setting circuits such as: 1) SiGe BiCMOS operational amplifiers with up to 37-GHz unity gain bandwidth; 2) a 2.5-V SiGe BiCMOS high-speed logic chip set consisting of 49-GHz retimer, 40-GHz TIAs, 80-GHz output driver with pre-emphasis and output swing control; and 3) 1-V 90-nm bulk and SOI CMOS TIAs with over 26-GHz bandwidth, less than 8-dB noise figure and operating at data rates up to 38.8 Gb/s. Such building blocks are required for the next generation of low-power 40-80 Gb/s wireline transceivers.

The invariance of characteristic current densities in nanoscale MOSFETs and its impact on algorithmic design methodologies and design porting of Si(Ge) (Bi)CMOS high-speed building blocks

The silicon germanium (SiGe) heterojunction bipolar transistor (HBT) marketplace covers a wide range of products and product requirements, particularly when combined with CMOS in a BiCMOS technology. A new base integration approach is presented which decouples the structural and thermal features of the HBT from the CMOS. The trend is to use this approach for future SiGe technologies for easier migration to advanced CMOS technology generations. Lateral and vertical scaling are used to achieve smaller and faster SiGe HBT devices with greatly increased current densities. Improving both the f/sub T/ and f/sub MAX/ will be a significant challenge as the collector and base dopant concentrations are increased. The increasing current densities of the SiGe HBT will put more emphasis on interconnects as a key factor in limiting transistor layout. Capacitors and inductors are two very important passives that must improve with each generation. The trend toward increasing capacitance in polysilicon-insulator-silicon (MOSCAP), polysilicon-insulator-polysilicon (Poly-Poly), and metal-insulator-metal (MIM) capacitors is discussed. The trend in VLSI interconnections toward thinner interlevel dielectrics and metallization layers is counter to the requirements of high Q inductors, potentially requiring a custom last metallization layer.

Current status and future trends of SiGe BiCMOS technology

A technology roadmap for the electrical performance of high-speed silicon–germanium (SiGe) heterojunction bipolar transistors (HBTs) is presented based on combining the results of various 1-D, 2-D, and 3-D technology computer-aided design (TCAD) simulation tools with geometry scalable compact modeling. The latter, including all known parasitic effects, enables the accurate determination of the figures of merit for both devices and selected benchmark circuits. The presented roadmap defines five major technology nodes with the maximum oscillation frequency of a typical high-frequency device structure as the main device design target under the constraints of various other parameters for generating the doping profiles and for defining the lateral scaling factors. An extensive and consistent set of technology and electrical parameters is provided along with the obtained scaling rules. The expected fabrication-related challenges and possible solutions for achieving the predicted performance are being discussed. It is hoped that the presented roadmap will be useful not only for foundries and equipment manufacturers but also for circuit and system designers enabling better predictions of the capability of SiGe–BiCMOS process technology for new millimeter-wave (mm-wave) and terahertz (THz) applications.

SiGe HBT Technology: Future Trends and TCAD-Based Roadmap

This paper presents a complete 0.13 μm SiGe BiCMOS technology fully dedicated to millimeter-wave applications, including a high-speed (230/280 GHz fT/fMAX) and medium voltage SiGe HBT, thick-copper back-end designed for high performance transmission lines and inductors, 2 fF/μm2 high-linearity MIM capacitor and complementary double gate oxide MOS transistors. Details are given on HBT integration, reliability and models as well as on back-end devices models.

0.13 $\mu$ m SiGe BiCMOS Technology Fully Dedicated to mm-Wave Applications

A 200 mm 0.35 /spl mu/m silicon-germanium heterojunction bipolar transistor (SiGe HBT) technology involving epitaxially-aligned polysilicon emitters is described. The devices are shown to combine the high speed performances typical for poly-Si emitter SiGe base devices (f/sub max/ up to 70 GHz) and the low 1/f noise properties of monocrystalline emitter structures (noise figure-of-merit KB as low as 7.2/spl times/10/sup -10/ /spl mu/m/sup 2/). Statistical current gain data are used to demonstrate the manufacturability of this innovative SiGe HBT technology.

A high-speed low 1/f noise SiGe HBT technology using epitaxially-aligned polysilicon emitters

A robust 0.25 /spl mu/m double-poly SiGe HBT structure using non selective epitaxy has been developed. The device features 70/90 GHz f/sub T//f/sub max/ with pure SiGe base in 0.25 /spl mu/m BiCMOS technology. Performances up to 120/100 GHz f/sub T//f/sub max/ are demonstrated for SiGe:C base transistors.

High performance 0.25 /spl mu/m SiGe and SiGe:C HBTs using non selective epitaxy

This paper presents the status of high-speed SiGe BiCMOS technologies at STMicroelectronics. Process and electrical characteristics of two 120-nm platforms, qualified or under development, are presented together with results demonstrated on optical and millimeter-wave circuits. Advanced developments addressing end-of-roadmap BiCMOS are also presented and discussed

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High-Speed SiGe BiCMOS Technologies: 120-nm Status and End-of-Roadmap Challenges

This paper describes a 230 GHz self-aligned SiGeC HBT featuring a selective epitaxial base and an arsenic-doped monocrystalline emitter. These technical choices are presented and discussed with respect to BiCMOS performance objectives and integration constraints.

230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology

A low complexity 0.35 /spl mu/m SiGe HBT technology, using a quasi self-aligned emitter/base structure on a non-selective Si/SiGe epitaxial base, is described. Excellent high frequency performances (f/sub max/ up to 71 GHz) are obtained, opening the way to a highly manufacturable SiGe BiCMOS technology.

M. Laurens

Papers

A high-speed low 1/f noise SiGe HBT technology using epitaxially-aligned polysilicon emitters

High performance 0.25 /spl mu/m SiGe and SiGe:C HBTs using non selective epitaxy

High-Speed SiGe BiCMOS Technologies: 120-nm Status and End-of-Roadmap Challenges

230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology

A high performance low complexity SiGe HBT for BiCMOS integration