In this paper, the properties of hybrid-phase microstructural indium tin oxide-stabilized ZnO thin films and the relevant high-performance thin-film transistors (TFTs) were systematically investigated. The optically extracted Urbach energy revealed that such thin films owned less band-tail state trapping in comparison with that of the corresponding amorphous thin films. This was determined by better atomic arrangement and might realize higher drift mobility theoretically. The influence of deposition parameters such as oxygen partial pressure ratio (PO2) and direct-current power ( $\text{P}_{\mathrm{ DC}})$ on thin films was discussed in detail. Then, the TFTs with optimal co-sputtering conditions were fabricated. Such devices exhibited a typical field-effect mobility of 26.1 cm2/ $\text{V}\cdot \text{s}$ , threshold voltage of 0.5 V, on–off ratio of over $10^{9}$ , and extremely low subthreshold swing of 89 mV/decade. Meanwhile, the spatial uniformity, air stability, and repeated switching behavior of devices were demonstrated to be excellent.

Investigation of High-Performance ITO-Stabilized ZnO TFTs With Hybrid-Phase Microstructural Channels

Thanks to the extraordinary advances flexible electronics have experienced over the last decades, applications such as conformable active-matrix displays, ubiquitously integrated disposable flexible sensor nodes, wearable or textile-integrated systems, as well as imperceptible and transient implants are now reachable. To enable these applications, specialized analog circuits able to transmit and receive data, condition sensors' parameters, drive actuators or control powering devices are required. High-performance sensor conditioning, driving and transceiver circuits on a wide range of flexible substrates are therefore extremely important to develop. However, the currently available materials and processes compatible with mechanically flexible substrates impose massive limitations in terms of large-area uniformity, device dimensions' shrinkability and circuit design, challenging the realization of flexible analog systems. Among state-of-the-art technologies employing low-temperature fabrication processes, thin-film transistors (TFTs) based on metal oxide semiconductors represent the potentially best compromise in terms of prize, performance, technology maturity and capacity to realize complex systems. This is why metal oxide TFTs are nowadays widely used for flexible, light-weight, transparent, stretchable and bio-degradable analog circuits and systems. Here, we review the current trends of flexible metal oxide TFTs for analog applications. First, an introduction is given, where current challenges and requirements related to the realization of flexible analog circuits and systems are analysed. Additionally, TFT performance parameters and configurations are briefly revised. Then, the recent advances in the field of flexible metal oxide TFTs for analog applications are summarized. In particular, all reported approaches to reduce the channel length and improve the AC performance are shown. Next, the current state of flexible metal oxide TFT-based analog circuits is shown, discussing n-type only and complementary circuit configurations. The last topic of the review covers systems based on flexible metal oxide analog circuits. Finally, a conclusion is drawn and an outlook over the field is provided.

https://iopscience.iop.org/article/10.1088/2058-8585/aba79a/pdf

Review of recent trends in flexible metal oxide thin-film transistors for analog applications

Indium-tin-zinc-oxide (ITZO) as the channel layer grown by co-sputtering of ZnO target and ITO target in the bottom gate thin-film transistors (TFTs) is proposed in this work. The microstructure and optical properties of ITZO thin films at different annealing temperatures were analyzed. The impact of various annealing temperatures on the ITZO TFT performance characteristics was systematically investigated as well. It was found that ITZO TFT with annealing temperature of 300 °C exhibits excellent electrical performance with a high saturation field-effect mobility (μsat) of 27.4 cm2 V−1 s−1, a low threshold voltage (Vth) of −0.64 V, a small subthreshold swing (SS) value of 0.23 V per decade, and the high on-off current ratio (Ion/Ioff) of 1.8 × 107. In addition, it also shows good output curves including gate control capabilities and good electrode contact as well as extreme atmospheric stability. As shown by photoluminescence (PL) analysis and X-ray photoelectron spectroscopy (XPS) analysis, the beneficial effects of various annealing temperatures on device performance are attributed to the reorganization of the amorphous network and the control of defect chemistry in the films. The correlation between the post-deposition thermal treatment and the characteristics of a transistor was investigated and excellent performance of the transistor was demonstrated.

/pdf/effects-of-annealing-temperature-on-properties-of-insnzno-1o3hrptgic.pdf

Effects of annealing temperature on properties of InSnZnO thin film transistors prepared by Co-sputtering

High-performance vacuum-processed metal oxide thin-film transistors: A review of recent developments

Due to their unique properties, ZnO nanostructures have received considerable attention for application in electronics and optoelectronics; however, intrinsic ZnO nanomaterials usually suffer from large concentrations of lattice defects, such as oxygen vacancies, which restricts their material performance. Here, for the first time, highly-crystalline In and Ga co-doped ZnO nanowires (NWs) are achieved by ambient-pressure chemical vapor deposition. In contrast to conventional elemental doping, this In and Ga co-doping can not only enhance the carrier concentration, but also suppresses the formation of oxygen vacancies within the host lattice of ZnO NWs. Importantly, this co-doping is also believed to effectively minimize the generation of lattice strain defects due to the optimal ionic sizes of both In and Ga dopants. When configured into field-effect transistors (FETs), these co-doped NWs exhibit an enhanced average electron mobility of 315 cm2 V-1 s-1 and an impressive on/off current ratio of 1.87 × 108, which are already higher than those of other previously reported ZnO NW devices. In addition, these NW devices demonstrate efficient ultraviolet photodetection at under 261 nm irradiation with an improved responsivity of 1.41 × 107 A W-1, an excellent EQE of up to 6.72 × 109 and a fast response time down to 0.32 s. Highly-ordered NW parallel array thin-film transistors and photodetectors are also constructed to demonstrate the promising potential of the NWs for high-performance device applications.

High-mobility In and Ga co-doped ZnO nanowires for high-performance transistors and ultraviolet photodetectors

In this paper, the ITO-stabilized ZnO thin films with a hybrid-phase microstructure were introduced, where a number of nanocrystals were embedded in an amorphous matrix The microstructural and optical properties of thin films were investigated It was found that the grain boundary and native defect issues in the pristine polycrystalline ZnO could be well suppressed Meanwhile, such thin films also possessed relatively smooth surface and high transmittance in the visible range Afterwards, the corresponding staggered top-gate thin-film transistors (TFTs) were fabricated at a temperature of 300 °C and exhibited fairly high electrical characteristics, especially with a field-effect mobility of nearly 20 cm2 V−1 s−1 and a subthreshold swing as low as 0115 V/decade In addition, the electrical uniformity and the stability of devices were also examined to be excellent It is expected that the staggered top-gate TFTs with hybrid-phase microstructural ITO-stabilized ZnO channels are promising in the next-genera

High-Performance Staggered Top-Gate Thin-Film Transistors with Hybrid-Phase Microstructural ITO-Stabilized ZnO Channels

In this letter, hybrid-phase microstructural ITO-stabilized ZnO thin films, which were capped by silane-sourced or tetraethyl-orthosilicate-sourced plasma-enhanced chemical vapor deposition (PECVD) SiO2 layers, were found to present remarkably different resistivity variation after O2 annealing treatment. Besides hydrogen-related factors, the silicon-doping phenomenon along with the silane-sourced PECVD process was also responsible for the durable low-resistivity state of the hybrid-phase microstructural ITO-stabilized ZnO thin films. Via a combination of differentiatedPECVD andO2 annealingprocesses, the self-aligned coplanar TFTs were fabricated, and they exhibited good electrical characteristics with an average field-effect mobility of 19.56 cm2/Vs, and a subthreshold swing of 105 mV/decade, as well as robust stability against gate-bias stress.

Hybrid-Phase Microstructural ITO-Stabilized ZnO TFTs With Self-Aligned Coplanar Architecture

(Invited) Bridged-grain (BG) Polycrystalline Silicon Thin Film Transistors (TFTs)

A novel hybrid-phase microstructure are introduced into InSnZnO thin films, where a number of nanocrystals are embedded in an amorphous matrix. Following the study on microstructural and electrical properties of thin films, the corresponding staggered bottomand top-gate thin-film transistors with optimal channels are both fabricated and exhibit a fairly high and uniform electrical performance, especially in field-effect mobility and subthreshold swing. In addition, such devices are also proven to be air-stable owing to in situ passivation of hybrid-phase microstructural InSnZnO channels.

Man Wong

Papers

Investigation of High-Performance ITO-Stabilized ZnO TFTs With Hybrid-Phase Microstructural Channels

High-Performance Staggered Top-Gate Thin-Film Transistors with Hybrid-Phase Microstructural ITO-Stabilized ZnO Channels

Hybrid-Phase Microstructural ITO-Stabilized ZnO TFTs With Self-Aligned Coplanar Architecture

(Invited) Bridged-grain (BG) Polycrystalline Silicon Thin Film Transistors (TFTs)

Achievement of High-Performance and Environmentally Stable TFTs by Introducing Hybrid-Phase Microstructure into InSnZnO Channels