Multilevel converters have been under research and development for more than three decades and have found successful industrial application. However, this is still a technology under development, and many new contributions and new commercial topologies have been reported in the last few years. The aim of this paper is to group and review these recent contributions, in order to establish the current state of the art and trends of the technology, to provide readers with a comprehensive and insightful review of where multilevel converter technology stands and is heading. This paper first presents a brief overview of well-established multilevel converters strongly oriented to their current state in industrial applications to then center the discussion on the new converters that have made their way into the industry. In addition, new promising topologies are discussed. Recent advances made in modulation and control of multilevel converters are also addressed. A great part of this paper is devoted to show nontraditional applications powered by multilevel converters and how multilevel converters are becoming an enabling technology in many industrial sectors. Finally, some future trends and challenges in the further development of this technology are discussed to motivate future contributions that address open problems and explore new possibilities.

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Recent Advances and Industrial Applications of Multilevel Converters

High-frequency-link (HFL) power conversion systems (PCSs) are attracting more and more attentions in academia and industry for high power density, reduced weight, and low noise without compromising efficiency, cost, and reliability. In HFL PCSs, dual-active-bridge (DAB) isolated bidirectional dc-dc converter (IBDC) serves as the core circuit. This paper gives an overview of DAB-IBDC for HFL PCSs. First, the research necessity and development history are introduced. Second, the research subjects about basic characterization, control strategy, soft-switching solution and variant, as well as hardware design and optimization are reviewed and analyzed. On this basis, several typical application schemes of DAB-IBDC for HPL PCSs are presented in a worldwide scope. Finally, design recommendations and future trends are presented. As the core circuit of HFL PCSs, DAB-IBDC has wide prospects. The large-scale practical application of DAB-IBDC for HFL PCSs is expected with the recent advances in solid-state semiconductors, magnetic and capacitive materials, and microelectronic technologies.

Overview of Dual-Active-Bridge Isolated Bidirectional DC–DC Converter for High-Frequency-Link Power-Conversion System

The demand for lightweight converters with high control performance and low acoustic noise led to an increase in switching frequencies of hard switched two-level low-voltage 3-phase converters over the last years. For high switching frequencies, converter efficiency suffers and can be kept high only by employing cost intensive switch technology such as SiC diodes or CoolMOS switches; therefore, conventional IGBT technology still prevails. In this paper, the alternative of using three-level converters for low-voltage applications is addressed. The performance and the competitiveness of the three-level T-type converter (3LT2C) is analyzed in detail and underlined with a hardware prototype. The 3LT2 C basically combines the positive aspects of the two-level converter such as low conduction losses, small part count and a simple operation principle with the advantages of the three-level converter such as low switching losses and superior output voltage quality. It is, therefore, considered to be a real alternative to two-level converters for certain low-voltage applications.

Design and Implementation of a Highly Efficient Three-Level T-Type Converter for Low-Voltage Applications

This paper analyzes the small-signal impedance of three-phase grid-tied inverters with feedback control and phase-locked loop (PLL) in the synchronous reference ( d-q ) frame. The result unveils an interesting and important feature of three-phase grid-tied inverters – namely, that its q–q channel impedance behaves as a negative incremental resistor. Moreover, this paper shows that this behavior is a consequence of grid synchronization, where the bandwidth of the PLL determines the frequency range of the resistor behavior, and the power rating of the inverter determines the magnitude of the resistor. Advanced PLL, current, and power control strategies do not change this feature. An example shows that under weak grid conditions, a change of the PLL bandwidth could lead the inverter system to unstable conditions as a result of this behavior. Harmonic resonance and instability issues can be analyzed using the proposed impedance model. Simulation and experimental measurements verify the analysis.

Analysis of D-Q Small-Signal Impedance of Grid-Tied Inverters

Switching devices based on wide bandgap materials such as silicon carbide (SiC) offer a significant performance improvement on the switch level (specific on resistance, etc.) compared with Si devices. Well-known examples are SiC diodes employed, for example, in inverter drives with high switching frequencies. In this paper, the impact on the system-level performance, i.e., efficiency, power density, etc., of industrial inverter drives and of dc-dc converter resulting from the new SiC devices is evaluated based on analytical optimization procedures and prototype systems. There, normally on JFETs by SiCED and normally off JFETs by SemiSouth are considered.

https://www.hpe.ee.ethz.ch/uploads/tx_ethpublications/SiC.pdf

SiC versus Si—Evaluation of Potentials for Performance Improvement of Inverter and DC–DC Converter Systems by SiC Power Semiconductors

Efficient energy conversion in low-voltage applications has gained more attention due to increasing energy costs and environmental issues. Accordingly, three-level converters have been discussed as an alternative to the standard two-level voltage-source converter because they offer an increased efficiency at higher switching frequencies. From a system perspective, the benefits of using three-level converters are not only limited to the converter itself, but there are additional positive impacts on the surrounding such as on the load machine losses or on the electromagnetic interference input filter volume. In this paper, a holistic comparison of advanced three-level topologies against the two-level topology is given. Simple analytical calculations and measurements show the benefits and the optimization potential concerning several aspects, such as the necessary semiconductor chip area, the harmonic losses in the load machine and in filter components, and the volume of passive components.

Comparative Evaluation of Advanced Three-Phase Three-Level Inverter/Converter Topologies Against Two-Level Systems

Inductive components such as line filter inductors or transformers occupy a significant amount of space in today's power electronic systems, and furthermore, considerable losses occur in these components. A main application of inductive components is EMI filters, as, e.g., employed for the attenuation of switching frequency harmonics of power factor correction (PFC) rectifier systems. In this paper, a design procedure for the mains side LCL filter of an active three-phase rectifier is introduced. The procedure is based on a generic optimization approach, which guarantees a low volume and/or low losses. Different designs are calculated to show the tradeoff between filter volume and filter losses. The design procedure is verified by experimental measurements. Furthermore, an overall system optimization, i.e., an optimization of the complete three-phase PFC rectifier, is given.

Optimal Design of LCL Harmonic Filters for Three-Phase PFC Rectifiers

In the low voltage converter range, 3-phase 3-level VSC topologies are not wide spread in industry because of the increased part count and higher costs, although they are more efficient for higher switching frequencies. In this paper an alternative 3-level topology referred to as T-type is presented, which is very high efficient for medium switching frequencies (4–20 kHz). Additionally, it is shown that the total silicon chip area of a 3-level topology can be lower than in a 2-level topology since the losses are distributed over more components leading to only a small increase in the junction temperature. This allows for the design of a chip area and cost optimized 3-level bridge leg module for the mass market.

Mario Schweizer

Papers

Design and Implementation of a Highly Efficient Three-Level T-Type Converter for Low-Voltage Applications

SiC versus Si—Evaluation of Potentials for Performance Improvement of Inverter and DC–DC Converter Systems by SiC Power Semiconductors

Comparative Evaluation of Advanced Three-Phase Three-Level Inverter/Converter Topologies Against Two-Level Systems

Optimal Design of LCL Harmonic Filters for Three-Phase PFC Rectifiers

Comparison of the chip area usage of 2-level and 3-level voltage source converter topologies