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Journal ArticleDOI

A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs

TLDR
The proposed level shifter circuit can convert low- voltage digital input signals into high-voltage digital output signals and achieves low-power operation because it dissipates operating current only when the input signal changes.
Abstract
This paper presents a level shifter circuit capable of handling extremely low-voltage inputs. The circuit has a distinctive current generation scheme using a logic error correction circuit that works by detecting the input and output logic levels. The proposed level shifter circuit can convert low-voltage digital input signals into high-voltage digital output signals. The circuit achieves low-power operation because it dissipates operating current only when the input signal changes. Measurement results demonstrated that the circuit can convert a 0.23-V input signal into a 3-V output signal. The power dissipation was 58 nW for a 0.4-V 10-kHz input pulse.

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Citations
More filters
Journal ArticleDOI

A Wide-Range Level Shifter Using a Modified Wilson Current Mirror Hybrid Buffer

TL;DR: A novel level shifter, of which the operating range is from a deep subthreshold voltage to the standard supply voltage and includes upward and downward level conversion and is designed for practical applications.
Journal ArticleDOI

Low-Power Level Shifter for Multi-Supply Voltage Designs

TL;DR: The proposed design reliably converts 180-mV input signals into 1-V output signals, while maintaining operational frequencies above 1-MHz, while taking into account process-voltage-temperature variations.
Journal ArticleDOI

A Low-Power Subthreshold to Above-Threshold Voltage Level Shifter

TL;DR: A power-efficient voltage level-shifter architecture that is capable of converting extremely low levels of input voltages to higher levels is presented that uses a current generator that turns on only during the transition times, in which the logic level of the input signal is not corresponding to the output logic level.
Journal ArticleDOI

An Ultra-Low Voltage Level Shifter Using Revised Wilson Current Mirror for Fast and Energy-Efficient Wide-Range Voltage Conversion from Sub-Threshold to I/O Voltage

TL;DR: A novel ultra-low voltage level shifter for fast and energy-efficient wide-range voltage conversion from sub-threshold to I/O voltage with good delay scalability with supply voltage scaling and low sensitivity to process and temperature variations is presented.
Journal ArticleDOI

Fast and Wide Range Voltage Conversion in Multisupply Voltage Designs

TL;DR: Because of a novel architecture combined with the use of multithreshold CMOS technique, the proposed circuit guarantees robust voltage shifting from the deep subthreshold to the above-threshold domain while exhibiting fast response and low energy consumption.
References
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Journal ArticleDOI

Matching properties of MOS transistors

TL;DR: In this paper, the matching properties of the threshold voltage, substrate factor, and current factor of MOS transistors have been analyzed and measured, and the matching results have been verified by measurements and calculations on several basic circuits.
Book

Fundamentals of Modern VLSI Devices

Yuan Taur, +1 more
TL;DR: In this article, the authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices.
Book

Sub-threshold Design for Ultra Low-Power Systems

TL;DR: The EKV Model of the MOS Transistor is used as a model for low-voltage circuit design and analog Circuits in Weak Inversion are studied.
Proceedings ArticleDOI

A 180mV FFT processor using subthreshold circuit techniques

TL;DR: Logic and memory design techniques allowing subthreshold operation are developed and demonstrated and the fabricated 1024-point FFT processor operates down to 180mV using a standard 0.18/spl mu/m CMOS logic process while using 155nJ/FFT at the optimal operating point.
Proceedings ArticleDOI

A 2.60pJ/Inst Subthreshold Sensor Processor for Optimal Energy Efficiency

TL;DR: The processor reaches maximum energy efficiency at 360mV, consuming 2.6pJ/Inst at 833kHz and the minimum energy consumption of the core marks a 10times improvement over previous sensor processors at the same MIPS.
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