Unipolar barrier structures are used to suppress dark current in photodetectors by blocking majority carriers. Designing unipolar barriers with conventional materials is challenging due to the strict requirements of lattice and band matching. Two-dimensional materials have self-passivated surfaces and tunable band structures, and can thus be used to design unipolar barriers in which lattice mismatch and interface defects are avoided. Here, we show that band-engineered van der Waals heterostructures can be used to build visible and mid-wavelength infrared unipolar barrier photodetectors. Our nBn unipolar barrier photodetectors, which are based on a tungsten disulfide/hexagonal boron nitride/palladium diselenide heterostructure, exhibit a low dark current of 15 pA, a photocurrent of 20 μA and a detectivity of 2.7 × 1012 cm Hz1/2 W−1. Our pBp unipolar barrier photodetectors, which are based on a black phosphorus/molybdenum disulfide/graphene heterostructure, exhibit a room-temperature detectivity of 2.3 × 1010 cm Hz1/2 W−1 in the mid-wavelength infrared region under blackbody radiation. The pBp devices also show a dichroic ratio of 4.9 under blackbody radiation, and a response time of 23 μs under 2 μm laser illumination. Band-engineered van der Waals heterostructures that block dark current without suppressing photocurrent can be used to build detectors with high room-temperature detectivity for visible light and blackbody infrared light.

Unipolar barrier photodetectors based on van der Waals heterostructures

: Uniform growth of pristine two dimensional (2D) materials over large areas at lower temperatures without sacrifice of their unique physical properties is a critical pre-requisite for seamless integration of next-generation van der Waals heterostructures into functional devices. This Letter describes a vapor phase growth technique for precisely controlled synthesis of continuous, uniform molecular layers of MoS2 on silicon dioxide and highly oriented pyrolitic graphite substrates of over several square centimeters at 350 deg C. Synthesis of few-layer MoS2 in this ultra-high vacuum physical vapor deposition process yields materials with key optical and electronic properties identical to exfoliated layers. The films are composed of nano-scale domains with strong chemical binding between domain boundaries, allowing lift-off from the substrate and electronic transport measurements from contacts with separation on the order of centimeters.

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Continuous Ultra-Thin MOS2 Films Grown by Low-Temperature Physical Vapor Deposition (Postprint)

Two-dimensional crystals have emerged as a class of materials that may impact future electronic technologies. Experimentally identifying and characterizing new functional two-dimensional materials is challenging, but also potentially rewarding. Here, we fabricate field-effect transistors based on few-layer black phosphorus crystals with thickness down to a few nanometres. Reliable transistor performance is achieved at room temperature in samples thinner than 7.5 nm, with drain current modulation on the order of 10(5) and well-developed current saturation in the I-V characteristics. The charge-carrier mobility is found to be thickness-dependent, with the highest values up to ∼ 1,000 cm(2) V(-1) s(-1) obtained for a thickness of ∼ 10 nm. Our results demonstrate the potential of black phosphorus thin crystals as a new two-dimensional material for applications in nanoelectronic devices.

http://absimage.aps.org/image/MAR14/MWS_MAR14-2013-005031.pdf

Black Phosphorus Field-effect Transistors

Atomic defects, being the most prevalent zero-dimensional topological defects, are ubiquitous in a wide range of 2D transition-metal dichalcogenides (TMDs). They could be intrinsic, formed during the initial sample growth, or created by postprocessing. Despite the majority of TMDs being largely unaffected after losing chalcogen atoms in the outermost layer, a spectrum of properties, including optical, electrical, and chemical properties, can be significantly modulated, and potentially invoke applicable functionalities utilized in many applications. Hence, controlling chalcogen atomic defects provides an alternative avenue for engineering a wide range of physical and chemical properties of 2D TMDs. In this article, we review recent progress on the role of chalcogen atomic defects in engineering 2D TMDs, with a particular focus on device performance improvements. Various approaches for creating chalcogen atomic defects including nonstoichiometric synthesis and postgrowth treatment, together with their characterization and interpretation are systematically overviewed. The tailoring of optical, electrical, and magnetic properties, along with the device performance enhancement in electronic, optoelectronic, chemical sensing, biomedical, and catalytic activity are discussed in detail. Postformation dynamic evolution and repair of chalcogen atomic defects are also introduced. Finally, we offer our perspective on the challenges and opportunities in this field.

Defect Engineering of Two-Dimensional Transition-Metal Dichalcogenides: Applications, Challenges, and Opportunities

Ultra-scaled transistors are of interest in the development of next-generation electronic devices1-3. Although atomically thin molybdenum disulfide (MoS2) transistors have been reported4, the fabrication of devices with gate lengths below 1 nm has been challenging5. Here we demonstrate side-wall MoS2 transistors with an atomically thin channel and a physical gate length of sub-1 nm using the edge of a graphene layer as the gate electrode. The approach uses large-area graphene and MoS2 films grown by chemical vapour deposition for the fabrication of side-wall transistors on a 2-inch wafer. These devices have On/Off ratios up to 1.02 × 105 and subthreshold swing values down to 117 mV dec-1. Simulation results indicate that the MoS2 side-wall effective channel length approaches 0.34 nm in the On state and 4.54 nm in the Off state. This work can promote Moore's law of the scaling down of transistors for next-generation electronics. 

/pdf/vertical-mos2-transistors-with-sub-1-nm-gate-lengths-py4aih8d.pdf

Vertical MoS2 transistors with sub-1-nm gate lengths

Rapid digital technology advancement has resulted in a tremendous increase in computing tasks imposing stringent energy efficiency and area efficiency requirements on next-generation computing. To meet the growing data-driven demand, in-memory computing and transistor-based computing have emerged as potent technologies for the implementation of matrix and logic computing. However, to fulfil the future computing requirements new materials are urgently needed to complement the existing Si complementary metal–oxide–semiconductor technology and new technologies must be developed to enable further diversification of electronics and their applications. The abundance and rich variety of electronic properties of two-dimensional materials have endowed them with the potential to enhance computing energy efficiency while enabling continued device downscaling to a feature size below 5 nm. In this Review, from the perspective of matrix and logic computing, we discuss the opportunities, progress and challenges of integrating two-dimensional materials with in-memory computing and transistor-based computing technologies. This Review discusses the recent progress and future prospects of two-dimensional materials for next-generation nanoelectronics.

Two-dimensional materials for next-generation computing technologies.

SNNs with temporal coding (TC), inspired by the human visual system, have a powerful ability to enable fast and low-power neuromorphic computing. Memristive devices show excellent performance on emulating spiking neurons and synapses in hardware. However, the neuron circuits used for implementing a fully memristive TC SNN are absent. In this work, for the first time, we demonstrate a LIF neuron based on a NbO x device to meet the requirements for the hardware implementation of TC SNNs. The neuron fires at most one spike within an inference window, and its spiking latency inverse to the input current intensity. Using such a neuron, we further experimentally demonstrated a fully memristive TC SNN (256 × 5) to recognize the Olivetti face patterns. Attributing to the one-spike scheme, the TC SNN achieves a sparser spiking number (~ 72 × reductions), faster inference speed (> 1.5 × improvement), lower power (~ 53 × reductions) than what happens in rate-coding SNNs.

Fully Memristive SNNs with Temporal Coding for Fast and Low-power Edge Computing

Hopfield neural network, as a recurrent neural network, has been widely used to solve non-deterministic polynomial time-hard problems. However, the network tends to get trapped into local minima and thus converge to sub-optimal solutions. In this work, the intrinsic read noise in the memristive Hopfield network was harnessed as the random perturbation source to mitigate this problem. Firstly, the read noise in devices (TiN/TaO x /HfO x /TiN) at different resistance levels from a 1 Kb array was statistically measured, and the distribution of it was extracted. Then the effect of reading noise levels on the performance of a $64 \times 64$ network solver is quantitatively evaluated through confining all devices with the identical distribution. Based on such a strategy, the success probability, the distribution of distance, the energy consumption, and time to solution, at different noise levels and iteration cycles were investigated. The simulated results demonstrate that the intrinsic read noise in the resistive weight matrix is indeed helpful for the network to escape from local minima, serving as a useful computing resource.

Ming Liu

Papers

Two-dimensional materials for next-generation computing technologies.

Fully Memristive SNNs with Temporal Coding for Fast and Low-power Edge Computing

Quantitatively Evaluating the Effect of Read Noise in Memristive Hopfield Network on Solving Traveling Salesman Problem