Recent success with the fabrication of high-performance GaN-on-Si high-voltage HFETs has made this technology a contender for power electronic applications. This paper discusses the properties of GaN that make it an attractive alternative to established silicon and emerging SiC power devices. Progress in development of vertical power devices from bulk GaN is reviewed followed by analysis of the prospects for GaN-on-Si HFET structures. Challenges and innovative solutions to creating enhancement-mode power switches are reviewed.

https://iopscience.iop.org/article/10.1088/0268-1242/28/7/074011/pdf

Gallium nitride devices for power electronic applications

In this paper, GaN power transistors on Si substrates for power switching application are reported. GaN heterojunction field-effect transistor (HFET) structure on Si is an important configuration in order to realize a low loss and high power devices as well as one of the cost-effective solutions. Current collapse phenomena are discussed for GaN-HFETs on Si substrate, resulting in suppression of the current collapse due to using the conducting Si substrate. Furthermore, attempts for normally off GaN-FETs were examined. A hybrid metal-oxide-semiconductor HFET structure is a promising candidate for obtaining devices with a lower on-resistance (Ron) and a high breakdown voltage (Vb).

GaN Power Transistors on Si Substrates for Switching Applications

In this paper, GaN power transistors on Si substrates for power switching application are reported. GaN heterojunction field-effect transistor (HFET) structure on Si is an important configuration in order to realize a low loss and high power devices as well as one of the cost-effective solutions. Current collapse phenomena are discussed for GaN-HFETs on Si substrate, resulting in suppression of the current collapse due to using the conducting Si substrate. Furthermore, attempts for normally off GaN-FETs were exam- ined. A hybrid metal-oxide-semiconductor HFET structure is a promising candidate for obtaining devices with a lower on-resistance ðRonÞ and a high breakdown voltage ðVbÞ.

GaN Power Transistors on Si Substrates for Switching Applications Hybrid MOS-FET transistor devices with low on-resistance, high hold-voltages and high breakdown voltage promise to provide high-power, low-loss operation for switching applications.

This letter reports normally-off operation of an AlGaN/GaN recessed MIS-gate heterostructure field-effect transistor with a high threshold voltage. The GaN-based recessed MIS-gate structure in conjunction with negative polarization charges under the gate allows us to achieve the high threshold voltage, whereas the low on-state resistance is maintained by the 2-D electron gas remaining in the channel except for the recessed MIS-gate region. The fabricated device exhibits a threshold voltage as high as 5.2 V with a maximum field-effect mobility of 120 cm2/Vmiddots, a maximum drain current of over 200 mA/mm, and a breakdown voltage of 400 V.

AlGaN/GaN Recessed MIS-Gate HFET With High-Threshold-Voltage Normally-Off Operation for Power Electronics Applications

There is a great interest in wide-bandgap semiconductor devices and most recently in monolithic GaN structures for power electronics applications. In this paper, vertical p-n diodes fabricated on pseudobulk low defect density ( $10^{4}$ – $10^{6}$ cm $^{-2}$ ) GaN substrates are discussed. Homoepitaxial low-pressure metal organic chemical vapor deposition growth of GaN on its native substrate and being able to control and balance the n-type Si doping with background C impurity has allowed the realization of vertical device architectures with drift layer thicknesses of 6 to 40 $\mu $ m and net carrier electron concentrations of $4\times 10^{15}$ to $2.5\times 10^{16}$ cm $^{-3}$ . This parameter range is suitable for applications requiring breakdown voltages (BVs) of 600 V–4 kV with a proper edge termination strategy. Measured devices demonstrate near power device figure of merit, that is, differential specific on-resistance ( $R_{{{\textrm {sp}}}}$ ) of 2 m $\Omega $ cm $^{2}$ for a BV of 2.6 kV and 2.95 m $\Omega $ cm $^{2}$ for a 3.7-kV device, respectively. The improvement in the substrate quality over the last few years has resulted in the fabrication of diodes with areas as large as 16 mm $^{2}$ , with BVs exceeding 700 V and pulsed (100 $\mu $ s) currents of 400 A. The structures fabricated are utilized to study in detail the temperature dependency of $I$ – $V$ characteristics, impact ionization and avalanche characteristics, and extract (estimate) modeling parameters such as electron mobility in the GaN $c$ -direction (vertical) and hole minority carrier lifetimes. Some insight into device reliability is also provided.

Vertical Power p-n Diodes Based on Bulk GaN

A novel method for fabricating trench structures on GaN was developed. A smooth non-polar (1100) plane was obtained by wet etching using tetramethylammonium hydroxide (TMAH) as the etchant. A U-shape trench with the (1100) plane side walls was formed with dry etching and the TMAH wet etching. A U-shape trench gate metal oxide semiconductor field-effect transistor (MOSFET) was also fabricated using the novel etching technology. This device has the excellent normally-off operation of drain current–gate voltage characteristics with the threshold voltage of 10 V. The drain breakdown voltage of 180 V was obtained. The results indicate that the trench gate structure can be applied to GaN-based transistors.

https://iopscience.iop.org/article/10.1143/APEX.1.021104/pdf

GaN-Based Trench Gate Metal Oxide Semiconductor Field-Effect Transistor Fabricated with Novel Wet Etching

We fabricated a vertical insulated gate AlGaN/GaN heterojunction field-effect transistor (HFET), using a free-standing GaN substrate. This HFET has apertures through which the electron current vertically flows. These apertures were formed by dry etching the p-GaN layer below the gate electrodes and regrowing n--GaN layer without mask. The HFET exhibited a specific on-resistance of as low as 2.6 mΩ·cm2 with a threshold voltage of -16 V. This HFET would be a prototype of a GaN-based high-power switching device.

https://iopscience.iop.org/article/10.1143/JJAP.46.L503/pdf

A Vertical Insulated Gate AlGaN/GaN Heterojunction Field-Effect Transistor

DLTS study of n-type GaN grown by MOCVD on GaN substrates

The plasma etching damage in p-type GaN has been characterized. From current-voltage and capacitance-voltage characteristics of Schottky diodes, it was revealed that inductively coupled plasma (ICP) etching causes an increase in series resistance of the Schottky diodes and compensation of acceptors in p-type GaN. We investigated deep levels near the valence band of p-type GaN using current deep level transient spectroscopy (DLTS), and no deep level originating from the ICP etching damage was observed. On the other hand, by capacitance DLTS measurements for n-type GaN, we observed an increase in concentration of a donor-type defect with an activation energy of 0.25eV after the ICP etching. The origin of this defect would be due to nitrogen vacancies. We also observed this defect by photocapacitance measurements for ICP-etched p-type GaN. For both n- and p-type GaN, we found that the low bias power ICP etching is effective to reduce the concentration of this defect introduced by the high bias power ICP etching.

Characterization of plasma etching damage on p-type GaN using Schottky diodes

The redistribution behavior of Mg in a sequentially regrown GaN epilayer on a p-type doped GaN template was studied. All samples in this study were regrown by metalorganic vapor phase epitaxy on the sapphire substrates. A high density and a slow tail of Mg concentration were observed in a nominally undoped layer due to the surface segregation. We found that the insertion of a low-temperature (LT) AlN interlayer was effective to suppress the Mg redistribution in the GaN regrown layer. Analyzing the temperature dependence of the surface segregation, the activation energy of the Mg segregation was estimated to be 0.63eV in GaN and 2.47eV in a LT-AlN layer, respectively.

Osamu Ishiguro

Papers

GaN-Based Trench Gate Metal Oxide Semiconductor Field-Effect Transistor Fabricated with Novel Wet Etching

A Vertical Insulated Gate AlGaN/GaN Heterojunction Field-Effect Transistor

DLTS study of n-type GaN grown by MOCVD on GaN substrates

Characterization of plasma etching damage on p-type GaN using Schottky diodes

Reduction of Mg segregation in a metalorganic vapor phase epitaxial grown GaN layer by a low-temperature AlN interlayer