Introduction to Electromagnetic Compatibility

Throughout the decades of continuous advances in semiconductor technology, from the discrete devices of the late 1950s to today's billon-transistor system-on-chip, there have always been concerns about the ability of components to operate safely in an increasingly disruptive electromagnetic environment. This paper provides a nonexhaustive review of the research work conducted in the field of electromagnetic compatibility (EMC) at the IC level over the past 40 years. It also brings together a collection of information and trends in IC technology, in order to build a tentative roadmap for the EMC of ICs until the year 2020, with a focus on measurement methods and modeling approaches.

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The Electromagnetic Compatibility of Integrated Circuits—Past, Present, and Future

A theory of overall quantization noise for nonsubtractive dither was originally developed in unpublished work by J.N. Wright and by T.J. Stockham and subsequently expanded by L.K. Brinton, S.P. Lipshitz, J. Vanderkooy, and R.A. Wannamaker. It is suggested that since these latter results are not as well known as the original results, misunderstanding persists in the literature. New proofs of the properties of quantizer dither, both subtractive and nonsubtractive, are provided. The new proofs are based on elementary Fourier series and Rice's characteristic function method and do not require the use of generalized functions (impulse trains of Dirac delta functions) and sampling theorem arguments. The goal is to provide a unified derivation and presentation of the two forms of dithered quantizer noise based on elementary Fourier techniques. >

http://ieeexplore.ieee.org/iel4/557/4025/00695075.pdf

Dithered Quantizers

An all-CMOS variable gain amplifier (VGA) that adopts a new approximated exponential equation is presented. The proposed VGA is characterized by a wide range of gain variation, temperature-independence gain characteristic, low-power consumption, small chip size, and controllable dynamic gain range. The two-stage VGA is fabricated in 0.18-mum CMOS technology and shows the maximum gain variation of more than 95 dB and a 90-dB linear range with linearity error of less than plusmn 1 dB. The range of gain variation can be controlled from 68 to 95 dB. The P1dB varies from - 48 to - 17 dBm, and the 3-dB bandwidth is from 32 MHz (at maximum gain of 43 dB) to 1.05 GHz (at minimum gain of - 52 dB). The VGA dissipates less than 3.6 mA from 1.8-V supply while occupying 0.4 mm2 of chip area excluding bondpads

A 95-dB linear low-power variable gain amplifier

The evolving global landscape for electrical distribution and use created a need area for energy storage systems (ESS), making them among the fastest growing electrical power system products. A key element in any energy storage system is the capability to monitor, control, and optimize performance of an individual or multiple battery modules in an energy storage system and the ability to control the disconnection of the module(s) from the system in the event of abnormal conditions. This management scheme is known as “battery management system (BMS)”, which is one of the essential units in electrical equipment. BMS reacts with external events, as well with as an internal event. It is used to improve the battery performance with proper safety measures within a system. Therefore, a safe BMS is the prerequisite for operating an electrical system. This report analyzes the details of BMS for electric transportation and large-scale (stationary) energy storage. The analysis includes different aspects of BMS covering testing, component, functionalities, topology, operation, architecture, and BMS safety aspects. Additionally, current related standards and codes related to BMS are also reviewed. The report investigates BMS safety aspects, battery technology, regulation needs, and offer recommendations. It further studies current gaps in respect to the safety requirements and performance requirements of BMS by focusing mainly on the electric transportation and stationary application. The report further provides a framework for developing a new standard on BMS, especially on BMS safety and operational risk. In conclusion, four main areas of (1) BMS construction, (2) Operation Parameters, (3) BMS Integration, and (4) Installation for improvement of BMS safety and performance are identified, and detailed recommendations were provided for each area. It is recommended that a technical review of the BMS be performed for transportation electrification and large-scale (stationary) applications. A comprehensive evaluation of the components, architectures, and safety risks applicable to BMS operation is also presented.

Review of Battery Management Systems (BMS) Development and Industrial Standards

A novel virtual reference concept is introduced in this paper to design accurate, mostly digital, software-defined, process-supply-and-temperature (PVT)-independent voltage references suitable to replace conventional analog reference circuits in present day, low voltage, aggressively scaled, mainly digital integrated systems. The operation and the performance of references based on the proposed approach are tested by computer simulations and experiments carried out on a proof-of-concept, microcontroller-based prototype, reporting a measured thermal drift of 16 ${\rm ppm}/^{\circ}{\rm C}$ in a range from $-\hbox{10}~^{\circ}{\rm C}$ to 100 $^{\circ}{\rm C}$ and a line regulation of 0.15%/V. The advantages in terms of costs and performance of the proposed digital references in comparison with state-of-the-art analog solutions are finally discussed.

A Digital-Based Virtual Voltage Reference

breaking the boundaries between analogue and digital

A novel rail-to-rail dynamic voltage comparator is presented in this paper. The proposed circuit is fully synthesizable, as it can be designed with automated digital design flows and standard cells, and can operate at very low voltages down to deep sub-threshold. Post-layout simulations show correct operation for rail-to-rail common-mode inputs at a supply voltage VDD down to 0.3 V. At such voltage, the input offset voltage standard deviation is less than 28 mV (8 mV) over the rail-to-rail common-mode input range (around VDD/2). The digital nature of the comparator and its ability to operate down to deep sub-threshold voltages allow its full integration with standard-cell digital circuits in terms of both design and voltage domain. The ease of design, the low area and the voltage scalability make the proposed comparator very well suited for sensor nodes, integrated circuits for the Internet of Things and related applications.

Fully Synthesizable, Rail-to-Rail Dynamic Voltage Comparator for Operation down to 0.3 V

In this paper, a new analytical model for the prediction of the effects of high-power electromagnetic interference in CMOS operational amplifiers is presented. This model provides a closed-form expression of the operational amplifiers (opamp) output offset voltage that is induced if radio frequency interference (RFI) is superimposed onto the opamp input voltages in terms of technology and design parameters. Such a model is very useful both to predict the susceptibility of a given opamp circuit and to design opamp topologies with a high immunity to RFI. Model predictions are compared with experimental results

Prediction of high-power EMI effects in CMOS operational amplifiers

The closed-loop bulk current injection (BCI) method employed to measure the immunity to electromagnetic interference of an electronic equipment in compliance with the ISO 11452-4 standard is critically assessed on the basis of an experimental characterization of its test setup. It is highlighted that, above 100 MHz, the injected bulk current estimated by the calibration procedure described in the standard is significantly different from the actual bulk current injected into the connector of the equipment under test (EUT) during BCI tests. Such a discrepancy gives rise to unreliable BCI immunity test results highlighting susceptibility issues that are not related with the actual susceptibility of the EUT.

Paolo Stefano Crovetti

Papers

A Digital-Based Virtual Voltage Reference

breaking the boundaries between analogue and digital

Fully Synthesizable, Rail-to-Rail Dynamic Voltage Comparator for Operation down to 0.3 V

Prediction of high-power EMI effects in CMOS operational amplifiers

A Critical Assessment of the Closed-Loop Bulk Current Injection Immunity Test Performed in Compliance With ISO 11452-4