Showing papers by "Paul W. Marshall published in 2006"

Multiple-bit upset in 103 nm CMOS technology.

Abstract: The probability of proton-induced multiple-bit upset (MBU) has increased in highly-scaled technologies because device dimensions are small relative to particle event track size. Both proton-induced single event upset (SEU) and MBU responses have been shown to vary with angle and energy for certain technologies. This work analyzes SEU and MBU in a 130 nm CMOS SRAM in which the single-event response shows a strong dependence on the angle of proton incidence. Current proton testing methods do not account for device orientation relative to the proton beam and, subsequently, error rate prediction assumes no angular dependencies. Proton-induced MBU is expected to increase as integrated circuits continue to scale into the deep sub-micron regime. Consequently, the application of current testing methods will lead to an incorrect prediction of error rates

Multiple-Bit Upset in 130 nm CMOS Technology

Abstract: The probability of proton-induced multiple-bit upset (MBU) has increased in highly-scaled technologies because device dimensions are small relative to particle event track size. Both proton-induced single event upset (SEU) and MBU responses have been shown to vary with angle and energy for certain technologies. This work analyzes SEU and MBU in a 130 nm CMOS SRAM in which the single-event response shows a strong dependence on the angle of proton incidence. Current proton testing methods do not account for device orientation relative to the proton beam and, subsequently, error rate prediction assumes no angular dependencies. Proton-induced MBU is expected to increase as integrated circuits continue to scale into the deep sub-micron regime. Consequently, the application of current testing methods will lead to an incorrect prediction of error rates

Compendium of Current Single Event Effects Results for Candidate Spacecraft Electronics for NASA

Abstract: Susceptibility of a variety of candidate spacecraft electronics to proton and heavy ion induced single event effects is studied. Devices tested include digital, linear bipolar, and hybrid devices.

Application of RHBD Techniques to SEU Hardening of Third-Generation SiGe HBT Logic Circuits

Abstract: Shift registers featuring radiation-hardening-by-design (RHBD) techniques are realized in IBM 8HP SiGe BiCMOS technology. Both circuit and device-level RHBD techniques are employed to improve the overall SEU immunity of the shift registers. Circuit-level RHBD techniques include dual-interleaving and gated-feedback that achieve SEU mitigation through local latch-level redundancy and correction. In addition, register-level RHBD based on triple-module redundancy (TMR) versions of dual-interleaved and gated-feedback cell shift registers is also realized to gauge the performance improvement offered by TMR. At the device-level, RHBD C-B-E SiGe HBTs with single collector and base contacts and significantly smaller deep trench-enclosed area than standard C-B-E-B-C devices with dual collector and base contacts are used to reduce the upset sensitive area. The SEU performance of these shift registers was then tested using heavy ions and standard bit-error testing methods. The results obtained are compared to the unhardened standard shift register designed with CBEBC SiGe HBTs. The RHBD-enhanced shift registers perform significantly better than the unhardened circuit, with the TMR technique proving very effective in achieving significant SEU immunity

An Investigation of Dose Rate and Source Dependent Effects in 200 GHz SiGe HBTs

Abstract: We present an investigation of the observed variations in the total dose tolerance of the emitter-base spacer and shallow trench isolation oxides in a commercial 200 GHz SiGe HBT technology. Proton, gamma, and X-ray irradiations at varying dose rates are found to produce drastically different degradation signatures at the various oxide interfaces. Extraction and analysis of the radiation-induced excess base current, as well as low-frequency noise, are used to probe the underlying physical mechanisms. Two-dimensional calibrated device simulations are employed to correlate the observed results to the spatial distributions of carrier recombination in forward- and inverse-mode operation for both pre- and post-irradiation levels. Possible explanations of our observations are offered and the implications for hardness assurance testing are discussed

Substrate Engineering Concepts to Mitigate Charge Collection in Deep Trench Isolation Technologies

Abstract: Delayed charge collection from ionizing events outside the deep trench can increase the SEU cross section in deep trench isolation technologies. Microbeam test data and device simulations demonstrate how this adverse effect can be mitigated through substrate engineering techniques. The addition of a heavily doped p-type charge-blocking buried layer in the substrate can reduce the delayed charge collection from events that occur outside the deep trench isolation by almost an order of magnitude, implying an approximately comparable reduction in the SEU cross section

The Effects of Irradiation Temperature on the Proton Response of SiGe HBTs

Abstract: We compare, for the first time, the effects of 63 MeV protons on 1st generation and 3rd generation SiGe HBTs irradiated at both liquid nitrogen temperature (77 K) and at room temperature (300 K). The 1st generation SiGe HBTs irradiated at 77 K show less degradation than when irradiated at 300 K. Conversely, the 3rd generation SiGe HBTs exhibits an opposite trend, and the devices irradiated at 77 K show enhanced degradation compared to those irradiated at 300 K. The emitter-base spacer regions for these two SiGe technologies are fundamentally different in construction, and apparently are responsible for the observed differences in temperature-dependent radiation response. At practical circuit biases, both SiGe technology generations show only minimal degradation for both at 77 K and 300 K exposure, to Mrad dose levels, and are thus potentially useful for electronics applications requiring simultaneous cryogenic temperature operation and significant total dose radiation exposure

Proton and gamma radiation effects in a new first-generation SiGe HBT technology

Abstract: The effects of proton and gamma irradiation on a new commercially available SiGe technology are investigated for the first time. The results of proton irradiation on a differential SiGe HBT LC oscillator are also reported in order to gauge circuit-level impact. These findings indicate that the dc, ac, and RF circuit performance is total dose tolerant up to Mrad-level equivalent total dose. A technology comparison is drawn between the results of this work and the three other previously reported SiGe technologies. We find that all reported SiGe HBT technologies to date show acceptable proton radiation tolerance up to Mrad levels. Transistor mismatch is also investigated here for the first time in SiGe HBTs. Collector current mismatch data as a function of emitter geometry are reported both before and after exposure for this SiGe HBT technology. We find only minimal changes in device-to-device mismatch after radiation exposure, suggesting that these SiGe HBTs should be suitable for use in analog circuits, which are critically dependent on the matching characteristics of the requisite devices.

Proton Tolerance of SiGe Precision Voltage References for Extreme Temperature Range Electronics

Abstract: A comprehensive investigation of the effects of proton irradiation on the performance of SiGe BiCMOS precision voltage references intended for extreme environment operational conditions is presented. The voltage reference circuits were designed in two distinct SiGe BiCMOS technology platforms (first generation (50 GHz) and third generation (200 GHz)) in order to investigate the effect of technology scaling. The circuits were irradiated at both room temperature and at 77 K. Measurement results from the experiments indicate that the proton-induced changes in the SiGe bandgap references are minor, even down to cryogenic temperatures, clearly good news for the potential application of SiGe mixed-signal circuits in emerging extreme environments

SEU Error Signature Analysis of Gbit/s SiGe Logic Circuits Using a Pulsed Laser Microprobe

Abstract: We present, for the first time, an analysis of the error signatures captured during pulsed laser microprobe testing of high-speed digital SiGe logic circuits. 127-bit shift registers, configured using various circuit level latch hardening schemes and incorporated into the circuit for radiation effects self test serve as the primary test vehicle. Our results indicate significant variations in the observed upset rate as a function of strike location and latch architecture. Error information gathered on the sensitive transistor nodes within the latches and characteristic upset durations agree well with recently reported heavy-ion microprobe data. These results support the growing credibility in using pulsed laser testing as a lower-cost alternative to heavy-ion microprobe analysis of sensitive device and circuit nodes, as well as demonstrate the efficiency of the autonomous detection and error approach for high speed bit-error rate testing. Implications for SEU hardening in SiGe are addressed and circuit-level and device-level Radiation Hardening By Design recommendations are made

X-Ray Irradiation and Bias Effects in Fully-Depleted and Partially-Depleted SiGe HBTs Fabricated on CMOS-Compatible SOI

Abstract: X-ray total ionizing dose effects in both fully-depleted and partially-depleted SiGe HBT-on-SOI transistors are investigated at room and at cryogenic temperatures for the first time. Devices irradiated in grounded and forward-active mode configurations exhibit a different behavior depending on the collector doping of the device. The degradation produced by 10 keV x-rays is compared to previously reported 63 MeV proton results on the same fully-depleted SiGe HBT-on-SOI devices, showing decreased degradation for proton irradiation. Both collector and substrate bias are shown to affect the two-dimensional nature of the current flow in these devices, resulting in significant differences in the avalanche multiplication characteristics (hence, breakdown voltage) across temperature

The Effects of Proton Irradiation on 90 nm Strained Si CMOS on SOI Devices

Abstract: The effects of 63 MeV proton irradiation on 90 nm strained silicon CMOS on insulator is examined for the first time. The devices show no observable degradation in DC performance up to an equivalent total dose of 600 krad(Si). The performance of the strained pFETs is identical to unstrained pFETs and demonstrates the immunity of strain to displacement damage. There is no significant enhancement observed in back channel leakage for the maximum dose. Passive exposure to 2 Mrad(Si) using 4 MeV protons doesn't induce any significant performance degradation.

An investigation of the effects of radiation exposure on stability constraints in epitaxial SiGe strained layers

Abstract: The thermodynamic stability of device-relevant epitaxial SiGe strained layers under proton irradiation is investigated using X-ray diffraction techniques, and compared with its stability constrain under high-temperature annealing. Irradiation with 63 MeV protons is found to introduce no significant microdefects into the SiGe thin films, regardless of starting stability condition of the SiGe film, and thus does not appear to be an issue for the use of SiGe HBT technology in emerging space systems. The strain relaxation of SiGe thin film under thermal annealing, however, is sensitive to the composition and thickness of the as-grown samples, as expected, with the subsequent lattice relaxation of the unstable samples occurring at a much higher rate than that of metastable samples.

Proton Tolerance of InAs Based HEMT and DHBT Devices

Abstract: The paper presents measurements of proton induced degradation in emerging low power high performance InAs based devices, including InAs/AlSb high electron mobility transistors (HEMT) and In0.86Ga0.14As base 6.0 Aring lattice constant double heterojunction bipolar transistor (DHBT) devices