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Pierre Edinger

Researcher at Royal Institute of Technology

Publications -  40
Citations -  337

Pierre Edinger is an academic researcher from Royal Institute of Technology. The author has contributed to research in topics: Silicon photonics & Photonics. The author has an hindex of 5, co-authored 26 publications receiving 118 citations.

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Journal ArticleDOI

MEMS for Photonic Integrated Circuits

TL;DR: The state of the art of MEMS tunable components in PICs is quantitatively reviewed and critically assessed with respect to suitability for large-scale integration in existing PIC technology platforms.
Journal ArticleDOI

MEMS-Enabled Silicon Photonic Integrated Devices and Circuits

TL;DR: MEMS-enabled components are integrated in a simplified silicon photonics process based on IMEC’s Standard iSiPP50G Silicon Photonics Platform and a custom release process to reduce power consumption and enhance functionality in photonic integrated circuits.
Journal ArticleDOI

Silicon photonic microelectromechanical phase shifters for scalable programmable photonics.

TL;DR: In this article, a phase shifter with low power photonic microelectromechanical system (MEMS) actuation on a silicon photonics foundry platform (IMEC's iSiPP50G) attains (2.9π±π) phase shift at 1550 nm, with an insertion loss of (0.33−0.10+0.15)dB, a Vπ of (10.7−1.4+2.2)V, and an Lπ of 17.2−4.8)µm.
Proceedings ArticleDOI

MORPHIC: programmable photonic circuits enabled by silicon photonic MEMS

TL;DR: The European project MORPHIC is developing a platform for programmable silicon photonic circuits enabled by waveguide-integrated micro-electro-mechanical systems (MEMS), which can be reconfigured using electronics and software, consisting of large interconnected meshes of phase shifters and couplers.
Journal ArticleDOI

Wafer-Level Vacuum Sealing by Transfer Bonding of Silicon Caps for Small Footprint and Ultra-Thin MEMS Packages

TL;DR: In this article, the authors demonstrate transfer bonding of 25-μm-thin silicon (Si) caps that are transferred from a 100mm-diameter silicon-on-insulator (SOI) wafer to a cavity wafer, to seal the cavities by gold-aluminum (Au-Al) thermocompression bonding at a low temperature of 250 °C.