When mirror-polished, flat, and clean wafers of almost any material are brought into contact at room temperature, they are locally attracted to each other by van der Waals forces and adhere or bond. This phenomenon is referred to as wafer bonding. The most prominent applications of wafer bonding are silicon-on-insulator (SOI) devices, silicon-based sensors and actuators, as well as optical devices. The basics of wafer-bonding technology are described, including microcleanroom approaches, prevention of interface bubbles, bonding of III-V compounds, low-temperature bonding, ultra-high vacuum bonding, thinning methods such as smart-cut procedures, and twist wafer bonding for compliant substrates. Wafer bonding allows a new degree of freedom in design and fabrication of material combinations that previously would have been excluded because these material combinations cannot be realized by the conventional approach of epitaxial growth.

Semiconductor wafer bonding

This paper provides a detailed overview of developments in transducer materials technology relating to their current and future applications in micro-scale devices. Recent advances in piezoelectric, magnetostrictive and shape-memory alloy systems are discussed and emerging transducer materials such as magnetic nanoparticles, expandable micro-spheres and conductive polymers are introduced. Materials properties, transducer mechanisms and end applications are described and the potential for integration of the materials with ancillary systems components is viewed as an essential consideration. The review concludes with a short discussion of structural polymers that are extending the range of micro-fabrication techniques available to designers and production engineers beyond the limitations of silicon fabrication technology.

/pdf/new-materials-for-micro-scale-sensors-and-actuators-an-21qnaonn0l.pdf

New materials for micro-scale sensors and actuators An engineering review

In this paper III-V on silicon-on-insulator (SOI) het- erogeneous integration is reviewed for the realization of near infrared light sources on a silicon waveguide platform, suitable for inter-chip and intra-chip optical interconnects. Two bonding technologies are used to realize the III-V/SOI integration: one based on molecular wafer bonding and the other based on DVS- BCB adhesive wafer bonding. The realization of micro-disk lasers, Fabry-Perot lasers, DFB lasers, DBR lasers and mode- locked lasers on the III-V/SOI material platform is discussed. Artist impression of a multi-wavelength laser based on micro- disk cavities realized on a III-V/SOI heterogeneous platform and a microscope image of a realized structure.

III‐V/silicon photonics for on‐chip and intra‐chip optical interconnects

Wafer-to-wafer bonding processes for microstructure fabrication are categorized and described. These processes have an impact in packaging and structure design. Processes are categorized into direct bonds, anodic bonds, and bonds with intermediate layers. Representative devices using wafer-to-wafer bonding are presented. Processes and methods for characterization of a range of bonding methods are discussed. Opportunities for continued development are outlined.

/pdf/wafer-to-wafer-bonding-for-microstructure-formation-5fhi80w5zw.pdf

Wafer-to-wafer bonding for microstructure formation

An intermediate substrate includes a handle substrate bonded to a thin layer suitable for epitaxial growth of a compound semiconductor layer, such as a III-nitride semiconductor layer. The handle substrate may be a metal or metal alloy substrate, such as a molybdenum or molybdenum alloy substrate, while the thin layer may be a sapphire layer. A method of making the intermediate substrate includes forming a weak interface in the source substrate, bonding the source substrate to the handle substrate, and exfoliating the thin layer from the source substrate such that the thin layer remains bonded to the handle substrate.

Bonded intermediate substrate and method of making same

Si, Ge, SiC, and diamond samples were implanted with H2+ at 120–160 keV with 5.0×1016 ions/cm2 (corresponding to 1.0×1017 H+ ions/cm2) and annealed at various temperatures to introduce hydrogen filled microcracks. An effective activation energy was determined for the formation of optically detectable surface blisters from the time required to form such blisters at various temperatures. The measured effective activation energies are close to the respective bond energies in all four materials. The time required to completely split hydrogen implanted layers from bonded silicon substrates and to transfer them onto oxidized silicon wafers is a factor of about 10 longer. Both processes, blister formation and layer splitting, show the same activation energy.

/pdf/layer-splitting-process-in-hydrogen-implanted-si-ge-sic-and-9bdgn32k75.pdf

Layer splitting process in hydrogen-implanted Si, Ge, SiC, and diamond substrates

A pronounced increase of interface energy of room temperature bonded hydrophilic Si/Si, Si/SiO/sub 2/, and SiO/sub 2//SiO/sub 2/ wafers after storage in air at room temperature, 150/spl deg/C for 10-400 h has been observed. The increased number of OH groups due to a reaction between water and the strained oxide and/or silicon at the interface at temperatures below 110/spl deg/C and the formation of stronger siloxane bonds above 110/spl deg/C appear to be the main mechanisms responsible for the increase in the interface energy. After prolonged storage, interface bubbles are detectable by an infrared camera at the Si/Si bonding seam. Desorbed hydrocarbons as well as hydrogen generated by a reaction of water with silicon appear to be the major contents in the bubbles. Design guidelines for low temperature wafer direct bonding technology are proposed. >

Low temperature wafer direct bonding

In advanced microsystems various types of devices (metal-oxide semiconductor field-effect transistors, bipolar transistors, sensors, actuators, microelectromechanical systems, lasers) may be on the same chip, some of which are 3D structures in nature. Therefore, not only materials combinations (integrated materials) are required for optimal device performance of each type but also process technologies for 3D device fabrication are essential. Wafer bonding and layer transfer are two of the fundamental technologies for the fabrication of advanced microsystems. In this review, the generic nature of both wafer bonding and hydrogen-implantation-induced layer splitting are discussed. The basic processes underlying wafer bonding and the layer splitting process are presented. Examples of bonding and layer splitting of bare or processed semiconductor and oxide wafers are described.

/pdf/wafer-bonding-and-layer-splitting-for-microsystems-uqutc8lljs.pdf

Wafer Bonding and Layer Splitting for Microsystems

Wafers prepared by an HF dip without a subsequent water rinse were bonded at room temperature and annealed at temperatures up to 1100 °C. Based on substantial differences between bonded hydrophilic and hydrophobic Si wafer pairs in the changes of the interface energy with respect to temperature, secondary ion mass spectrometry (SIMS) and transmission electron microscopy (TEM), we suggest that hydrogen bonding between Si‐F and H‐Si across two mating wafers is responsible for room temperature bonding of hydrophobic Si wafers. The interface energy of the bonded hydrophobic Si wafer pairs does not change appreciably with time up to 150 °C. This stability of the bonding interface makes reversible room‐temperature hydrophobic wafer bonding attractive for the protection of silicon wafer surfaces.

/pdf/hydrophobic-silicon-wafer-bonding-22utw6pyo8.pdf

Hydrophobic silicon wafer bonding

In microsystems technologies, frequently complex structures consisting of structured or plain silicon or other wafers have to be joined to one mechanically stable configuration. In many cases, wafer bonding, also termed fusion bonding, allows to achieve this objective. The present overview will introduce the different requirements surfaces have to fulfill for successful bonding especially in the case of silicon wafers. Special emphasis is put on understanding the atomistic reactions at the bonding interface. This understanding has allowed the development of a simple low temperature bonding approach which allows to reach high bonding energies at temperatures as low as 150°C. Implications for pressure sensors will be discussed as well as various thinning approaches and bonding of dissimilar materials.

/pdf/wafer-bonding-for-microsystems-technologies-am222olemf.pdf

Q.-Y. Tong

Papers

Layer splitting process in hydrogen-implanted Si, Ge, SiC, and diamond substrates

Low temperature wafer direct bonding

Wafer Bonding and Layer Splitting for Microsystems

Hydrophobic silicon wafer bonding

Wafer bonding for microsystems technologies