Numerical study on the performance metrics of lightly doped drain and source graphene nanoribbon field effect transistors with double-material-gate

This paper presents an analytical 1/f noise model of fully overlapped lightly doped drain MOSFET incorporating the voltage drop in the n/sup -/ region due to the parasitic resistance. The FOLD structure has lesser noise effect than LDD MOSFET and the predicted results are verified with experimental data.

1/f noise model of fully overlapped lightly doped drain MOSFET

An analytical model to determine the intrinsic drain-source series resistance of a fully overlapped lightly doped drain (FOLD) MOSFET is presented. Considering outer and inner fringing capacitances and the depletion of the n- surface caused by the normal electric field from the gate, I-V characteristics, transconductance, drain conductance, channel resistance, cut-off frequency and transit time are studied. It is shown that, because of the lesser parasitic resistance of the FOLD structure, the device provides higher current driving ability than the lightly doped drain and can suppress hot carrier degradation by avoiding degradation due to the depletion of the n- region by electrons trapped in the sidewall. Some of the predictions of the model are verified with experimental data.

http://iopscience.iop.org/article/10.1088/0268-1242/14/6/301/pdf

A new analytical model to determine the drain-source series resistance of FOLD MOSFET

A semi-empirical approach to analyze small geometry effects in LDD MOSFETs

Purpose – To study the breakdown (MI) mechanism in the sub‐micron MOSFET device.Design/methodology/approach – Second‐order Poisson's differential equation is solved for suitable boundary condition to find the electric field expression for the sub‐micron devices. With the help of the electric field expression the exact relation for multiplication factor is derived, and then the equation for breakdown voltage has been generated.Findings – This research paper provides the following findings: by controlling oxide thickness, junction depth and drain voltage, the breakdown can be easily controlled in the sub‐micron device; multiplication factor is not only affected by maximum field but also due to critical field; for very low gate voltage, the offset voltage mainly governs the breakdown; the breakdown voltage increases continuously as the channel length increases. It means, for larger channel length the breakdown will occur at high drain voltage.Research limitation – This paper is based on the assumption that t...

Study of avalanche breakdown (MI) mode in sub micron MOSFET device

Cut off frequency and transit time analysis of lightly doped drain (LDD) MOSFETs

A new optimal predictive model of ion-implanted Si d-MESFETs with improved performance is proposed. We demonstrate quantitatively that Pearson's higher moments have a major influence on the device performance. An enhancement in the drain–source current is reported. Reduction of the threshold voltage is also established when compared with the gaussian approach. The closer agreement with the experimental data confirms the validity of this model.

Optimization of Si MESFET model with Pearson distribution (FMA) : a novel approach

An accurate model for the device capacitances of ion-implanted MESFETs using Pearson distribution annealing is reported. The effects of profile shape factors on the intrinsic gate-source and gate-drain capacitances are analyzed in the pre- and post-anneal conditions. An established reduction in capacitances with Pearson's higher moments approach leads to optimization of devices performances.

Influence of profile shape factors on intrinsic Si-MESFET device capacitances under diffusion mechanism

We present a new analytical model for switching characteristics of Si d-MESFETs using Pearson-IV-distribution. The analysis is carried out with P, As and Sb implantations under thermal annealing. The behaviour of switching parameters viz., drain-source resistance and time constants (tgs, tgd and tT) is studied. We also demonstrate the influence of Pearson distribution on the profile shape effects extensively. The model explains the complicated dependences of the switching parameters on the profile studies. The results are compared with Gaussian Model and a reduction in time constants indicates an enhancement of the device performance.

S. Rajesh

Papers

Cut off frequency and transit time analysis of lightly doped drain (LDD) MOSFETs

Optimization of Si MESFET model with Pearson distribution (FMA) : a novel approach

Influence of profile shape factors on intrinsic Si-MESFET device capacitances under diffusion mechanism

A Fuzzy Method to Optimize the Performance of Si d-MESFETs: Influence of Pearson Profile