Showing papers by "Sanjay K. Banerjee published in 1997"

Methods of forming thin film transistors

Abstract: A method of forming a thin film transistor over a substrate is provided whereby at least one of the source region or the drain region is conductively doped while preventing conductivity doping of the channel region without any masking of the channel region occurring by any separate masking layer. A method includes, a) providing a substrate having a node to which electrical connection is to be made; b) providing a first electrically insulative dielectric layer over the substrate; c) providing an electrically conductive gate layer over the first dielectric layer; d) providing a second electrically insulative dielectric layer over the electrically conductive gate layer; e) providing a contact opening through the second dielectric layer, the electrically conductive gate layer and the first dielectric layer; the contact opening defining projecting sidewalls; f) providing a gate dielectric layer within the contact opening laterally inward of the projecting sidewalls; g) providing a layer of semiconductive material over the second dielectric layer and within the contact opening against the gate dielectric layer and in electrical communication with the node; the semiconductive material within the contact opening defining an elongated and outwardly extending channel region the electrical conductance of which can be modulated by means of the adjacent electrically conductive gate and gate dielectric layers; and h) conductively doping the semiconductive material layer lying outwardly of the contact opening to form one of a source region or a drain region of a thin film transistor. Thin film transistor construction are also disclosed.

Chemical vapor deposition growth and characterization of undoped and doped Ge and Ge1−xCx quantum dots on Si

Abstract: Germanium quantum dots have been grown on Si substrates at various temperatures for different durations and studied with atomic force microscopy to determine the growth conditions for the smallest and most uniform size quantum dots. Ge1−xCx quantum dots grown at varying Ge:C ratios have been characterized to study the effects of strain compensation by C. The effects of P and B doping on both Ge and Ge1−xCx dots have also been investigated. The results show fewer quantum dots in Ge1−xCx due to strain compensation of Ge by C, and suggest the formation of larger dots with P doping and smaller and more uniform dots with B doping. X-ray diffraction measurements on the samples show the strain in the films, with the rocking curves changing with the ratio of C in the quantum dots.

Evolution of subsurface hydrogen from boron-doped si(100)

Abstract: The reactions of atomic hydrogen with boron-doped Si(100) were studied using temperature programmed desorption (TPD). In addition to adsorbing at surface sites, hydrogen penetrates into boron-doped Si(100) samples and gets trapped by forming subsurface boron–hydrogen complexes. H2-TPD spectra, taken after exposure to atomic hydrogen, showed, in addition to the well known dihydride (680 K) and monohydride (795 K) desorption features, two peaks at 600 and 630 K due to decomposition of subsurface boron–hydrogen complexes. Increasing total hydrogen uptake with increasing dosing temperature (1.7 ML at 300 K, 4.2 ML at 500 K), suggests an activation barrier for subsurface hydrogen uptake. A quantitative correlation between boron concentration and subsurface hydrogen uptake is shown.

Growth and characterization of silicon thin films employing supersonic jets of SiH4 on polysilicon and Si(100)

Abstract: Supersonic jets of silane were employed to deposit silicon on both polysilicon and Si(100) at substrate temperatures ranging from 500 to 650 °C. The growth rate and film uniformity were studied as a function of silane kinetic energy. Increasing the SiH4 precursor kinetic energy from 0.4 eV (10% SiH4 in He mixture) to 1 eV (1% SiH4 in H2 mixture) results in as much as an order of magnitude increase in reaction probability. The advantage of using high kinetic energy precursors to enhance deposition is reflected in the centerline growth rates obtained employing supersonic jets of SiH4. At higher substrate temperatures, the high kinetic energy SiH4 jet has a higher growth rate than the low kinetic energy SiH4 jet, although, the flux of the high energy jet at the centerline is a factor of 8 less than the flux of the low energy jet. The silane flux distribution from the supersonic jet is dependent on the gas mixture; a flux distribution of cos55 θ results from the 1% silane in hydrogen jet (1 eV) compared to a ...

Applications of silicon-germanium-carbon in MOS and bipolar transistors

Abstract: This paper will review growth of Si-Ge and Si-Ge-C alloys using various low thermal budget epitaxial schemes such as UHVCVD, RTPCVD and MBE. The growth issues, materials aspects and bandgap and strain engineering in these alloys will be discussed. The prospective of using these alloys in strained-channel Si-Ge MOSFETs and MODFETs in order to enhance CMOS in the giga-scale era will be discussed. We will also describe the use of these films in Si-Ge HBTs for high speed r-f type applications.

Effects of in situ doping from B2H6 and PH3 on hydrogen desorption and the low-temperature growth mode of Si on Si(100) by remote plasma enhanced chemical vapor deposition

Abstract: We demonstrate that di- and monohydride desorption peak temperatures are shifted lower for boron-doped films and higher for phosphorus-doped films compared to intrinsic Si(100). This observation is exploited to show that the shifts in di- and monohydride desorption peak temperatures with doping are accompanied by shifts in the growth mode transition temperatures, with one exception which is discussed. This work suggests that dihydrides lead to breakdown of epitaxial growth while monohydrides promote three-dimensional epitaxial growth.

Thin film transistor constructions with polycrystalline silicon-germanium alloy doped with carbon in the channel region

Abstract: A thin film transistor includes, a) a thin film source region; b) a thin film drain region; c) a polycrystalline thin film channel region intermediate the thin film source region and the thin film drain region; d) a transistor gate and gate dielectric operatively positioned adjacent the thin film channel region; and e) the thin film channel region comprising at least an inner layer, an outer layer and a middle layer sandwiched between the inner layer and the outer layer, the inner layer and the outer layer comprising polycrystalline silicon and having respective energy bandgaps, the middle sandwich layer comprising a polycrystalline material and having a lower energy bandgap than either of the inner and outer layers. Alternately, the channel region is homogeneous, comprising germanium or an alloy of polycrystalline silicon and germanium. A method of increasing the size of individual crystal grains in a polycrystalline silicon alloy includes, a) providing germanium atoms within a layer of polycrystalline silicon to form a polycrystalline silicon-germanium alloy; and b) heating the polycrystalline silicon-germanium alloy to an effective temperature for an effective period of time to cause individual polycrystalline silicon grains within the alloy to increase their size from prior to the heating step.

Enhancement of drain current in vertical SiGe/Si PMOS transistors using novel CMOS technology

Abstract: CMOS devices are being scaled for density and speed. However, scaling gate length is impeded by lithographic technology and scaling device width is limited by low hole mobility in PMOS transistors. In vertical MOS transistors, however, lithography does not limit the channel length. Current drive in PMOS devices may also be increased by use of a SiGe channel. In fact, the hole mobility in strained SiGe normal to the growth plane is predicted to be significantly larger than in its unstrained counterpart. Therefore, we propose vertical Si/sub 1-x/Ge/sub x//Si PMOS and Si NMOS transistors and demonstrate (1) 100% increase of drive current in a vertical SiGe PMOS device, (2) the first experimental evidence of the enhancement of out-of-plane hole mobility in a vertical PMOSFET, and (3) experimental results for vertical NMOS devices, thus exhibiting the promise of vertical SiGe/Si CMOS.

Automation of a remote plasma-enhanced chemical vapor deposition system using LabVIEW

Abstract: The remote plasma-enhanced chemical vapor deposition (RPCVD) system is an experimental low temperature Si/Si-Ge epitaxy system. This paper describes an integrated hardware/software automation package developed for the RPCVD system. Aspects of the system controlled by the package include pneumatic gas valves, mass flow controllers (MFCs), and a temperature controller. The package was developed on an Apple Quadra 950 platform using LabVIEWTM 3.1 and associated data acquisition and control hardware supplied by National Instruments and other vendors. The software interface allows the user to operate the system through a virtual control panel which displays critical system parameters such as chamber pressure, chamber temperature and gas flow rates, along with the states of the gas valves and the MFCs. The system can also be run in the recipe mode, in which a sequence of steps are read in from an ExcelTM file. A simulation routine scans each recipe for possible errors such as violation of valve interlocks while the recipe is being loaded. All actions, whether in the manual mode or the recipe mode, are recorded in a log file. Finally, since many of the gases used in the RPCVD process are toxic and/or flammable, there is an emphasis on safety in the entire control scheme. A safety monitor routine constantly checks for valve interlocks and pressure-valve interlocks. Upon detecting an illegal state, it automatically takes necessary action to bring the system into a safe state. In addition to these software safety features, there are also hardware interlocks to deal with such situations as power outages.© (1997) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

SiGe/Si vertical PMOSFET device design and fabrication

Abstract: As channel lengths shrink continuously to smaller dimensions in order to improve performance and packing density, lithography, isolation, power supply and short channel effects have proved to be major limitations. Recently vertical MOSFETs (VMOS), also known as surround gate transistors, or 3-D side- wall transistors have been shown to overcome these process limitations. In this paper, we review the various VMOS technologies and applications and compare the performance of these devices to planar devices. We also present a novel deep submicron vertical SiGe/Si PMOSFET fabricated by Ge implantation. The Ge was implanted in the Si vertical channel to form a strained SiGe layer to increase drive current in P channel devices. PMOS drive current can be increased by about 100% compared to Si control devices. Thus, this technology offers CMOS circuit designers the flexibility to match PMOS and NMOS current drive capabilities, which was previously limited by the difference in electron and hole mobilities in Si.

Use of metal-oxide-semiconductor capacitors in the analysis of low-temperature epitaxial Si films deposited by remote plasma-enhanced chemical vapor deposition

Abstract: This article discusses the electrical characterization of low-temperature intrinsic Si films deposited by remote plasma-enhanced chemical vapor deposition. Metal-oxide-semiconductor (MOS) capacitors were fabricated on films deposited over a range of temperatures. Conventional MOS measurements such as capacitance versus voltage, breakdown voltage, Zerbst plot, and charge-to-breakdown were used to analyze the capacitors. The results of these measurements not only yielded information about the electrical properties of the films, but also led to conclusions regarding structural quality and the presence of metal contamination. This, coupled with the fact that capacitor fabrication requires only a simple, moderate-thermal budget process, makes MOS capacitor measurements an attractive technique for the characterization of low temperature epitaxial Si films.

Laser-enhanced epitaxy of Si and Si-Ge

Abstract: This paper discusses low temperature Si homoepitaxy on Si (100) substrates by the photolytic decomposition of Si 2 H 6 by the 193 nm emission of an ArF excimer laser in a photo-enhanced chemical vapor deposition (PCVD) system The growth involves photolytic decomposition of Si 2 H 6 and the generation and adsorption of SiHSiH 3 precursors on the hydrogenated Si surface PCVD of Si was achieved in two ways: with the laser passing parallel to the substrate or directly incident on it For parallel laser incidence, controllable deposition rates of 05–4 A min −1 were achieved Epitaxial films were achieved at temperatures as low as 250 °C using photon flux densities of 10 16 photons pulse −1 cm −2 , and Si 2 H 6 partial pressures of 20 mTorr For parallel incidence, very low defect density films in terms of stacking faults and dislocation loops (less than 10 5 cm −2 ), and excellent crystallinity have been grown at 250 °C and low laser power, as confirmed by Schimmel etching and Nomarski microscopy, transmission electron microscopy (TEM), electron diffraction and in situ reflection high energy electron diffraction (RHEED) The growth rates were observed to be linearly dependent on laser power For direct laser incidence, very high growth rates (20–80 A min −1 ) were obtained Single crystal films with a growth rate of ~ 20 A min −1 were obtained at a photon flux density of 7 × 10 14 photons pulse −1 cm −2 at 300 °C and 20 mTorr Si 2 H 6 partial pressure Boron doping with abrupt doping transitions has been achieved in the low temperature epitaxial films by introducing B 2 H 6 during the process Phosphorus doping has been achieved using PH 3 Epitaxial Si 1− x Ge x films using Si 2 H 6 and Ge 2 H 6 have been achieved Si/Si 1− x Ge x heterostructures with sharp Ge transitions have been grown by exploiting the low temperature capability of the PCVD process