S
Satoshi Nagai
Researcher at Toshiba
Publications - 113
Citations - 911
Satoshi Nagai is an academic researcher from Toshiba. The author has contributed to research in topics: Ultrasonic sensor & Signal. The author has an hindex of 15, co-authored 113 publications receiving 891 citations.
Papers
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Patent
Ultrasonic wave probe
TL;DR: In this paper, a back loading material that improves ultrasonic wave transmitting and receiving performance was used to improve the accuracy of movement of vibrating elements by attaching a coating material of a specified thickness to the vibrating element.
Journal ArticleDOI
The three dimensional groundwater flow detection method using ultrasonic reflection ec h o
Masaru Toida,Tanaka Mayumi,Satoshi Nagai,Takehiko Suzuki,Mitsuyoshi Sato,Masafumi Komai,Toshiaki Ohe,Makoto Nishigaki +7 more
Patent
Exposure apparatus, exposure method and manufacturing method of semiconductor device
Satoshi Nagai,Eiji Yoneda +1 more
TL;DR: In this article, a resist film formed on a processing layer is exposed by irradiating exposure light with a first wavelength belonging to an EUV band and auxiliary light having a second wavelength different from the first wavelength, the auxiliary light being separately generated from the exposure light.
Patent
Ultrasonic flaw detector, method and program
Chihoshi Atsushi,Yamamoto Setsu,Satoshi Nagai,Makoto Ochiai,Mihashi Tadahiro,Satoshi Yamamoto,Hiroyuki Adachi,Junichi Takabayashi +7 more
TL;DR: In this article, an ultrasonic flaw detection technique for executing position measurement and sizing of an internal flaw of a welded portion with high accuracy is proposed, which includes a transmission section 20 for transmitting ultrasonic beam Ba at a predetermined transmission angle θt from a transmission point 23 of a first base metal 43a to a welding portion 41 at a reception point 33 of a second base metal43b.
Patent
Semiconductor device, manufacturing method for a semiconductor device, and nontransitory computer readable medium storing a pattern generating program
TL;DR: In this paper, a semiconductor device includes a stacked body of N (N is an integer of 2 or more) layers stacked on a substrate and openings different in depth surrounded by the stacked body and separated from each other.