Shey-Shi Lu

TL;DR: In this paper, lattice-matched Ga051In049P/GaAs and strained In02Ga08As doped-channel FETs were investigated in terms of DC and microwave performances, including frequency response, noise figure, power-added efficiency (PAE), and output power.

TL;DR: In this paper, backside ICP etching is used to reduce the substrate loss and parasitic capacitance in the millimeter-wave frequency bands, and hence is very promising for millimeterwave CMOS RFIC applications.

TL;DR: In this article, a low-insertion-loss V-band complementary metaloxide-semiconductor (CMOS) band-pass filter is demonstrated, which can be tuned individually by adjusting the value of the series capacitor (Cs) and the size of the built-in inductor-capacitor (LC) resonator, respectively.

Abstract: Selective removal of the silicon underneath the transformers in MS/RF integrated circuits based on inductively-coupled-plasma (ICP) deep trench technology is demonstrated. A 20.6 dB improvement in isolation (from -40.4 dB to -61dB) was achieved for a dummy open device after the backside ICP dry etching. A 102% increase in Q-factor (from 4.96 to 10) was achieved at 5.2 GHz for an interlaced fully symmetrical stacked transformer with turn ratio of 1:1 after the backside ICP dry etching. In addition, for a 3-D stacked transformer with turn ratio of 1:2 after the backside ICP dry etching, a 40% increase in Q-factor (from 2 to 2.8), a 14.1% increase in maximum power gain GAmax (from 0.461 to 0.526), and a 17.2% reduction in minimum noise figure NFmin (from 3.37 dB to 2.79 dB) are obtained at 2 GHz. These results show the CMOS process compatible backside ICP etching technique is very promising for system-on-a-chip (SOC) applications.

TL;DR: In this article, a monolithic concurrent dual-band low-noise amplifier (LNA) using InGaP/GaAs HBT technology is demonstrated for the first time, which provides narrowband gain and matching simultaneously at both 1.57 GHz and 5.25 GHz bands.