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Shey-Shi Lu

Researcher at National Taiwan University

Publications -  300
Citations -  3680

Shey-Shi Lu is an academic researcher from National Taiwan University. The author has contributed to research in topics: CMOS & Noise figure. The author has an hindex of 30, co-authored 300 publications receiving 3431 citations. Previous affiliations of Shey-Shi Lu include National Chi Nan University & National Taiwan University of Science and Technology.

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Designing methods and circuits for multi-band electronic circuits

TL;DR: In this article, the authors proposed a design method and circuits for a multi-band electronic circuit having at least one transistor having an input terminal and an inductor electrically connected to the input terminal of the transistor.
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High-breakdown-voltage Ga0.51In0.49P/GaAs I-HEMT and I2HEMT with a GaInP passivation layer grown by gas source molecular beam epitaxy

TL;DR: The first Ga0.51In0.49P/GaAs inverted-structure high electron mobility transistors (I-HEMT) and insulated-gate inverted-STM transistors grown by gas source molecular beam epitaxy (GSMBE) have been fabricated and measured.
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Piezoresistive response induced by piezoelectric charges in n-type GaAs mesa resistors for application in stress transducers

TL;DR: In this article, the effect of piezoelectric charge densities in n-GaAs mesa resistors has been studied as a function of surface stress, and it is shown that the surface stresses induced by the deformation of cantilever beams can cause non-uniform stress distributions within the resistors, and the stress gradients consequently yield considerable piElectric charges that lead to an appreciable resistance change.
Proceedings ArticleDOI

A pliable and batteryless real-time ECG monitoring system-in-a-patch

TL;DR: A batteryless wearable ECG monitoring system-in-a-patch assembled by a biocompatible and pliable silicon- in-parylene technology is introduced, capable of processing the acquired ECG signal and detecting arrhythmia by a built-in digital signal processor (DSP).
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A 90-nm CMOS V-Band Low-Power Image-Reject Receiver Front-End With High-Speed Auto-Wake-Up and Gain Controls

TL;DR: A low-power auto-wake-up image-reject receiver front-end in 90-nm CMOS technology is presented for V-band applications and Adjustable linearity (IP1dB) of the front- end is provided by changing two gain modes (high- and low-gain modes).