Advances in physics

This paper presents a Schmitt-trigger-based single-ended 11T SRAM cell, which significantly improves read and write static noise margin (SNM) and consumes low power. Simulation results show that the cell also achieves the lowest leakage power dissipation among the cells considered for comparison. We also investigate the impact of process, voltage, and temperature variations on various performance parameters, such as hold SNM, read SNM, write margin, immunity to half-select issue, $I_{\mathrm{\scriptscriptstyle ON}}/I_{\mathrm{\scriptscriptstyle OFF}}$ ratio of read path, and leakage power of the cell; Monte Carlo simulation results confirm the robustness of the proposed cell toward these issues. Layout drawn in a 45-nm technology rule shows that the proposed cell occupies $2.02\times $ greater area as compared with 6T SRAM cells. However, $6.9\times $ higher $I_{\mathrm{\scriptscriptstyle ON}}/I_{\mathrm{\scriptscriptstyle OFF}}$ ratio of the read path of the proposed cell as compared with 6T cell holds potential to significantly subside the area overhead. A new figure of merit that comprehensively captures stability, delay, power dissipation, and area of an SRAM cell is also proposed. Based on the proposed metric, we observe that the proposed cell outperforms all, but one of the SRAM cells considered in this paper.

Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell

Background:
Wearable sensing and information and communication technologies are key enablers driving the transformation of health care delivery toward a new model of connected health (CH) care. The advances in wearable technologies in the last decade are evidenced in a plethora of original articles, patent documentation, and focused systematic reviews. Although technological innovations continuously respond to emerging challenges and technology availability further supports the evolution of CH solutions, the widespread adoption of wearables remains hindered.
Methods:
This study followed the scoping review methodology to identify and process the available literature. As the scope surpasses the possibilities of manual search, we relied on the natural language processing tool kit to ensure an efficient and exhaustive search of the literature corpus in three large digital libraries: Institute of Electrical and Electronics Engineers, PubMed, and Springer. The search was based on the keywords and properties to be found in articles using the search engines of the digital libraries.
Results:
The annual number of publications in all segments of research on wearable technology shows an increasing trend from 2010 to February 2019. The technology-related topics dominated in the number of contributions, followed by research on information delivery, safety, and security, whereas user-related concerns were the topic least addressed. The literature corpus evidences milestones in sensor technology (miniaturization and placement), communication architectures and fifth generation (5G) cellular network technology, data analytics, and evolution of cloud and edge computing architectures. The research lag in battery technology makes energy efficiency a relevant consideration in the design of both sensors and network architectures with computational offloading. The most addressed user-related concerns were (technology) acceptance and privacy, whereas research gaps indicate that more efforts should be invested into formalizing clear use cases with timely and valuable feedback and prescriptive recommendations.
Conclusions:
This study confirms that applications of wearable technology in the CH domain are becoming mature and established as a scientific domain. The current research should bring progress to sustainable delivery of valuable recommendations, enforcement of privacy by design, energy-efficient pervasive sensing, seamless monitoring, and low-latency 5G communications. To complement technology achievements, future work involving all stakeholders providing research evidence on improved care pathways and cost-effectiveness of the CH model is needed.

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Literature on Wearable Technology for Connected Health: Scoping Review of Research Trends, Advances, and Barriers

Solid-state memory is an essential component of the digital age. With advancements in healthcare technology and the Internet of Things (IoT), the demand for ultra-dense, ultra-low-power memory is increasing. In this review, we present a comprehensive perspective on the most notable approaches to the fabrication of physically flexible memory devices. With the future goal of replacing traditional mechanical hard disks with solid-state storage devices, a fully flexible electronic system will need two basic devices: transistors and nonvolatile memory. Transistors are used for logic operations and gating memory arrays, while nonvolatile memory (NVM) devices are required for storing information in the main memory and cache storage. Since the highest density of transistors and storage structures is manifested in memories, the focus of this review is flexible NVM. Flexible NVM components are discussed in terms of their functionality, performance metrics, and reliability aspects, all of which are critical components for NVM technology to be part of mainstream consumer electronics, IoT, and advanced healthcare devices. Finally, flexible NVMs are benchmarked and future prospects are provided.

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Review on Physically Flexible Nonvolatile Memory for Internet of Everything Electronics

We have experimentally investigated the polarization-limited operation speed of Negative Capacitance FET (NCFET) through direct measurement of negative capacitance in transient behavior of ferroelectric HfO 2 capacitor and physics-based modeling, for the first time. Systematic analysis of frequency dependence and transient characteristics of ferroelectric HfO 2 capacitor enabled accurate parameter extraction. With extracted parameters, our newly developed time-dependent NCFET model provided the evidence that NCFET can operate at >MHz, which is suitable for ultralow power IoT application.

Experimental study on polarization-limited operation speed of negative capacitance FET with ferroelectric HfO 2

We demonstrated record 0.37V minimum operation voltage (V min ) of 2Mb Silicon-on-Thin-Buried-oxide (SOTB) 6T-SRAM. Thanks to the small variability of SOTB (A VT ∼1.3 mVµm) and adaptive back biasing (ABB), V min was lowered down to ∼0.4 V regardless of temperature. Both fast access time and small standby leakage were achieved by ABB.

Ultralow-voltage operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM down to 0.37 V utilizing adaptive back bias

Causes of drain current local variability are analyzed by decomposing into current variability components. Besides V TH and G m components, it is newly found that effects of “current onset” variability caused by channel potential fluctuations largely contribute to the current variability and that G m component is relatively small in the saturation region. It is shown that both V TH and current onset components decreases with reducing channel dopants, indicating that intrinsic channel is very effective to reduce current variability.

Analysis and prospect of local variability of drain current in scaled MOSFETs by a new decomposition method

This paper reports new device trends of ultra-low power, ultra-low leakage, and ultra-low voltage for IoT applications. The SOTB technology achieves subthreshold leakage as low as 0.2pA/µm. Some device/circuit tricks for non-volatility and ultra-low voltage operation are reviewed.

Ultra-low power and ultra-low voltage devices and circuits for IoT applications

Threshold voltage (V TH ) variability of 10G (10 billion) transistors is measured using a special device-matrix-array test-element-group (DMA TEG) exclusively for ultra-fast V TH measurements. It is found that V TH variability in nFETs almost follows the normal distribution up to ±6σ, while pFETs have a clear “tail” in low V TH region. The origin of the non-normal distribution is analyzed by measuring transistors fabricated in two different fabs and by 3D device simulation.

Measuring threshold voltage variability of 10G transistors

Intrinsic channel SOI MOSFETs were fabricated and their variability were compared with conventional bulk MOSFETs. It is found for the first time that, besides V TH variability, both DIBL variabitlity and current-onset voltage variability are well suppressed in the intrinsic channel SOI MOSFETs thanks to non-intentionally doped channel. Reduction of channel doping is essential to reduce the characteristics variability in scaled FETs.

Tomoko Mizutani

Papers

Ultralow-voltage operation of Silicon-on-Thin-BOX (SOTB) 2Mbit SRAM down to 0.37 V utilizing adaptive back bias

Analysis and prospect of local variability of drain current in scaled MOSFETs by a new decomposition method

Ultra-low power and ultra-low voltage devices and circuits for IoT applications

Measuring threshold voltage variability of 10G transistors

Suppression of DIBL and current-onset voltage variability in intrinsic channel fully depleted SOI MOSFETs