Showing papers by "Toshitsugu Sakamoto published in 2018"

Sensor Signal Processing Using High-Level Synthesis With a Layered Architecture

Abstract: This letter describes a newly established design framework with the layered architecture of processing elements (PEs) exploiting high-level synthesis and its evaluation results. The design framework was developed for intelligent sensor nodes of Internet of Things applications that collaborate with cloud systems, in which small footprint and low power consumption were major concerns. The design framework consists of four layered structure of PE architecture with the extended database management function of a high-level synthesis tool. We investigated the dependencies of resource consumption on the granularity of coarse grained function definitions using the extended database management function of CyberWorkBench. The evaluation results showed that small footprint was achieved especially with dynamically reconfigurable technique.

Switch circuit and semiconductor device employing the same

Abstract: PROBLEM TO BE SOLVED: To provide a high-reliability switch circuit which implements an ideal connection of an input line and an output line.SOLUTION: A switch circuit comprises: multiple changeover switches for which the numbers of input lines and the numbers of output lines are equal to each other; and at least either first selectors for selecting input lines or second selectors for selecting output lines among the multiple changeover switches. In each of the changeover switches, the input lines are connected to the first selectors that are different from each other, and the output lines are connected to the second selectors that are different from each other. The first selector and the second selector select an input line and an output line connected to switch elements turning on the switch element connected to the input line and the output line that should be connected, and do not select an input line and an output line connected to switch elements turning on the switch elements connected to an input line and an output line that should not be connected. In a case where both the first selector and the second selector are included, the first selector and the second selector select an input line and an output line of the same changeover switch.SELECTED DRAWING: Figure 1

Atom Switch with Improved Cycle Endurance using Field Enhancement for Nonvolatile SoC

Abstract: Multi-usage atom switch as "nonvolatile routing switch in FPGA" and "nonvolatile memory (NVM)" is newly developed for ultra-low power SoC in IoT applications. A novel Cu electrode structure inducing an electric field enhancement achieves 100k-cycle endurance and 10-year retention for NVM. The developed atom switch enables both a nonvolatile FPGA macro and an NVM macro to be embedded in a single SoC.

High-Density and Fault-Tolerant Cu Atom Switch Technology Toward 28nm-node Nonvolatile Programmable Logic

Abstract: Key device/circuit technologies for realizing a 28nm-node atom switch programmable logic (AS-PL) have been developed. An advanced polymer solid-electrolyte (PSE) reduces set voltage down to 1.6 V while ensuring ON-state and OFF-state reliabilities under current and voltage stress at 125°C. A fine-grain redundancy in a cross-bar array also contributes to reduce supply voltage by 6%. A routing-based wear leveling improves programming cycles by nine times. The developed technologies allow us to design the 28nm-node AS-PL with a 32% higher performance and 11% lower power.

Semiconductor integrated circuit and method of operating the same

Abstract: PROBLEM TO BE SOLVED: To easily check the state of a resistance change element.SOLUTION: A semiconductor integrated circuit includes a crossbar switch circuit, and a determination circuit 102 which measures the electric potential of a data output side wiring of a reconfigurable circuit including the crossbar switch circuit, compares the measured electric potential with a predetermined electric potential threshold, and, on the basis of the result of the comparison, determines a failure of the crossbar switch circuit targeted in the reconfigurable circuit.SELECTED DRAWING: Figure 23

Writing apparatus and method for complementary resistive switch

Abstract: A reconfigurable circuit comprising: a complementary resistive switch; a write circuit to configure the complementary resistive switch; a read circuit to get ON/OFF information of the complementary resistive switch; a register to store ON/OFF information of the complementary resistive switch.

Semiconductor device and programming method therefor

Abstract: In order to provide a highly reliable crossbar circuit that enables salvation of reversal of a resistive state of a variable resistance element, the semiconductor device has a configuration obtained by parallelly arranging two unit elements, each including variable-resistance two-terminal elements connected in series, the semiconductor device being provided with: a unit element group being connected to a first wiring and a second wiring; a first programming driver that changes, via the first wiring, a resistive state of the two-terminal element constituting the unit element group; a first selection transistor being connected to the first wiring and the first programming driver; a second programming driver that changes, via the second wiring, a resistive state of the two-terminal element constituting the unit element group; and a second selection transistor being connected to the second wiring and the second programming driver.

Resistance change element and method of manufacturing the same and semiconductor device

Abstract: A resistance change element includes: a first insulating film provided on a semiconductor substrate formed on a transistor; first and second electrodes embedded in the first insulating film which supply metal ion; a second insulating film covering the first insulating film and the first and second electrodes; first and second opening portions exposing parts of an upper surface including end portions of the first and second electrodes from the second insulating film with translational symmetry; metal deposition type first and second resistance change films covering the first and second opening portions and connecting to the parts of the upper surface including the end portions of the first and second electrodes at the opening portions; third and fourth electrodes connecting to upper surfaces of the first and second resistance change films; and a fifth electrode connecting to the third and fourth electrodes and to a diffusion layer of the transistor.

Design assistance system and design assistance method

Abstract: In order to provide a highly reliable programmable logic integrated circuit, this design assistance system, which assists in designing circuits mounted in a programmable logic integrated circuit equipped with a variable resistance element, has an overwriting history information generation means that generates overwriting history information indicating the number of changes in the state of the variable resistance element, a wear cost generation means that, on the basis of the overwriting history information, calculates a wear cost for a switch included in the circuit, and a wiring means that carries out wiring of the circuit on the basis of an evaluation function that includes the wear cost.

Programmable logic integrated circuit, programming method therefor and program therefor

Abstract: The purpose of the present invention is to provide a circuit capable of reducing leakage power in a programmable logic circuit using resistance change elements. To this end, the present invention is a programmable logic integrated circuit comprising a switch matrix provided with, as a switch element, a plurality of first resistance change elements connected to an input line and an output line, wherein a buffer is connected to the output line, the programmable logic integrated circuit being characterized in that power is not supplied to the buffer that is connected to the output line and does not contribute to an operation of a desired logic circuit, the operation being caused when the logic circuit has been programmed.

Programmable logic circuit and semiconductor device using same

Abstract: In order to output two potential values of a power supply voltage and a ground voltage and provide a reconfigurable logic integrated circuit having a small circuit area, this programmable logic circuit is provided with: a first switch; a second switch; a pair of transistors, which is a P-type transistor and an N-type trans each having a gate connected to an input terminal, the P-type transistor having a source connected to the power supply voltage directly or via the first switch, and the N-type transistor having a drain connected to the ground voltage directly or via the second switch; and a third switch which is linked with the first switch and the second switch and outputs, to an output terminal, a drain voltage of the P-type transistor, which is in an on-state and the source of which is connected to the power supply voltage, or a source voltage of the N-type transistor, which is in an on-stae and the drain of which is connected to the ground voltage.