A review of recent MOSFET threshold voltage extraction methods

A high-mobility organic semiconductor employed as the active material in a field-effect transistor does not guarantee per se that expectations of high performance are fulfilled. This is even truer if a downscaled, short channel is adopted. Only if contacts are able to provide the device with as much charge as it needs, with a negligible voltage drop across them, then high expectations can turn into high performances. It is a fact that this is not always the case in the field of organic electronics. In this review, we aim to offer a comprehensive overview on the subject of current injection in organic thin film transistors: physical principles concerning energy level (mis)alignment at interfaces, models describing charge injection, technologies for interface tuning, and techniques for characterizing devices. Finally, a survey of the most recent accomplishments in the field is given. Principles are described in general, but the technologies and survey emphasis is on solution processed transistors, because it is our opinion that scalable, roll-to-roll printing processing is one, if not the brightest, possible scenario for the future of organic electronics. With the exception of electrolyte-gated organic transistors, where impressively low width normalized resistances were reported (in the range of 10 Ω·cm), to date the lowest values reported for devices where the semiconductor is solution-processed and where the most common architectures are adopted, are ∼10 kΩ·cm for transistors with a field effect mobility in the 0.1-1 cm(2)/Vs range. Although these values represent the best case, they still pose a severe limitation for downscaling the channel lengths below a few micrometers, necessary for increasing the device switching speed. Moreover, techniques to lower contact resistances have been often developed on a case-by-case basis, depending on the materials, architecture and processing techniques. The lack of a standard strategy has hampered the progress of the field for a long time. Only recently, as the understanding of the rather complex physical processes at the metal/semiconductor interfaces has improved, more general approaches, with a validity that extends to several materials, are being proposed and successfully tested in the literature. Only a combined scientific and technological effort, on the one side to fully understand contact phenomena and on the other to completely master the tailoring of interfaces, will enable the development of advanced organic electronics applications and their widespread adoption in low-cost, large-area printed circuits.

Charge injection in solution-processed organic field-effect transistors: physics, models and characterization methods.

Revisiting MOSFET threshold voltage extraction methods

The electronic properties of silicon, such as the conductivity, are largely dependent on the density of the mobile charge carriers, which can be tuned by gating and impurity doping. When the device size scales down to the nanoscale, routine doping becomes problematic due to inhomogeneities. Here we report that a molecular monolayer, covalently grafted atop a silicon channel, can play a role similar to gating and impurity doping. Charge transfer occurs between the silicon and the molecules upon grafting, which can influence the surface band bending, and makes the molecules act as donors or acceptors. The partly charged end-groups of the grafted molecular layer may act as a top gate. The doping- and gating-like effects together lead to the observed controllable modulation of conductivity in pseudometal−oxide−semiconductor field-effect transistors (pseudo-MOSFETs). The molecular effects can even penetrate through a 4.92-μm thick silicon layer. Our results offer a paradigm for controlling electronic character...

Controllable molecular modulation of conductivity in silicon-based devices.

Critical MOSFETs operation for low voltage/low power IC's: ideal characteristics, parameter extraction, electrical noise and RTS fluctuations

A new method for extracting the drain-induced barrier lowering (DIBL) parameter in an MOS transistor is proposed. This method is used to study the influence of temperature on the DIBL effect. It is found that the DIBL parameter is almost independent of temperature between 50 and 300K. This method makes it also possible to recalculate the intrinsic output characteristics that the device would have in the absence of DIBL, and, in turn, to evaluate the intrinsic device saturation parameters.

Temperature dependence of drain-induced barrier lowering in deep submicrometre MOSFETs

As the MOSFET channel length shrinks to 0.1 µm, the influence of the lateral field on the device characteristics becomes increasingly important even at low drain voltage (10 mV). The authors present a new method which takes into account the effect of the lateral field to extract the deep submicrometre MOSFET parameters such as threshold voltage, effective channel length, effective mobility and parasitic series resistance.

Method for extracting deep submicrometre MOSFET parameters

A recent characterization technique, ′′Drain Current Charge Pumping method (DCCP)′′, is modified for modelling the interface traps density, by taking into account the mobility degradation and parasitic series resistance. Such modification makes the technique applicable for both long and short channel devices. The extracted interface trap density is compared with results obtained using the classical charge pumping and the capacitance methods.

W. Fikry

Papers

Temperature dependence of drain-induced barrier lowering in deep submicrometre MOSFETs

Method for extracting deep submicrometre MOSFET parameters

Adaptation of "Drain Current Charge Pumping Technique" for Interface Trap Characterization in Short Channel MOS Transistors