Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

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High-κ gate dielectrics: Current status and materials properties considerations

The scaling of complementary metal oxide semiconductor transistors has led to the silicon dioxide layer, used as a gate dielectric, being so thin (14?nm) that its leakage current is too large It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (?) or 'high K' gate oxides such as hafnium oxide and hafnium silicate These oxides had not been extensively studied like SiO2, and they were found to have inferior properties compared with SiO2, such as a tendency to crystallize and a high density of electronic defects Intensive research was needed to develop these oxides as high quality electronic materials This review covers both scientific and technological issues?the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure and reactions, their electronic structure, bonding, band offsets, electronic defects, charge trapping and conduction mechanisms, mobility degradation and flat band voltage shifts The oxygen vacancy is the dominant electron trap It is turning out that the oxides must be implemented in conjunction with metal gate electrodes, the development of which is further behind Issues about work function control in metal gate electrodes are discussed

https://iopscience.iop.org/article/10.1088/0034-4885/69/2/R02/pdf

High dielectric constant gate oxides for metal oxide Si transistors

The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin (1.4 nm) that its leakage current is too large. It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (κ) or 'high K' gate oxides such as hafnium oxide and hafnium silicate. Little was known about such oxides, and it was soon found that in many respects they have inferior electronic properties to SiO2 ,s uch as a tendency to crystallise and a high concentration of electronic defects. Intensive research is underway to develop these oxides into new high quality electronic materials. This review covers the choice of oxides, their structural and metallurgical behaviour, atomic diffusion, their deposition, interface structure and reactions, their electronic structure, bonding, band offsets, mobility degradation, flat band voltage shifts and electronic defects. The use of high K oxides in capacitors of dynamic random access memories is also covered.

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High dielectric constant oxides

Atomic layer deposition (ALD) of smooth and highly conformal films of hafnium and zirconium oxides was studied using six metal alkylamide precursors for hafnium and zirconium. Water was used as an oxygen source during these experiments. As deposited, these films exhibited a smooth surface with a measured roughness equivalent to that of the substrate on which they were deposited. These films also exhibited a very high degree of conformality:  100% step coverage on holes with aspect ratios greater than 35. The films were completely uniform in thickness and composition over the length of the deposition reactor. The films were free of detectable impurities and had the expected (2:1) oxygen-to-metal ratio. Films were deposited at substrate temperatures from 50 to 500 °C from precursors that were vaporized at temperatures from 40 to 140 °C. The precursors were found to be highly reactive with hydroxylated surfaces. Their vapor pressures were measured over a wide temperature range. Deposition reactor design and ...

Atomic Layer Deposition of Hafnium and Zirconium Oxides Using Metal Amide Precursors

The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin that the gate leakage current becomes too large. This led to the replacement of SiO2 by a physically thicker layer of a higher dielectric constant or ‘high-K’ oxide such as hafnium oxide. Intensive research was carried out to develop these oxides into high quality electronic materials. In addition, the incorporation of Ge in the CMOS transistor structure has been employed to enable higher carrier mobility and performance. This review covers both scientific and technological issues related to the high-K gate stack – the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure, their electronic structure, band offsets, electronic defects, charge trapping and conduction mechanisms, reliability, mobility degradation and oxygen scavenging to achieve the thinnest oxide thicknesses. The high K oxides were implemented in conjunction with a replacement of polycrystalline Si gate electrodes with metal gates. The strong metallurgical interactions between the gate electrodes and the HfO2 which resulted an unstable gate threshold voltage resulted in the use of the lower temperature ‘gate last’ process flow, in addition to the standard ‘gate first’ approach. Work function control by metal gate electrodes and by oxide dipole layers is discussed. The problems associated with high K oxides on Ge channels are also discussed.

/pdf/high-k-materials-and-metal-gates-for-cmos-applications-4hs77i3c4a.pdf

High-K materials and metal gates for CMOS applications

Dielectric properties of ultrathin hafnium oxide reoxidized with rapid thermal annealing (RTA) have been investigated. Capacitance equivalent oxide thickness (CET) of 45 A hafnium oxide was scaled down to ∼10 A with a leakage current less than 3×10−2 A/cm2 at −1.5 V (i.e., ∼2 V below VFB). Leakage current increase due to crystallization was not observed even after 900 °C rapid thermal annealing (RTA), but CET did increase after high temperature RTA due to the interfacial layer growth and possible silicate formation in the HfO2 film.

Thermal stability and electrical characteristics of ultrathin hafnium oxide gate dielectric reoxidized with rapid thermal annealing

ZrO2 thin film has been studied as an alternative gate dielectric. It was deposited directly on a Si substrate by reactive sputtering. An equivalent oxide thickness of less than 11 A with a leakage current of 1.9×10−3 A/cm2 at −1.5 V relative to the flat band voltage has been obtained. Well-behaved capacitance–voltage characteristics with an interface state density of less than 1011 cm−2 eV−1 and no significant frequency dispersion have been achieved. Excellent reliability properties (e.g., low charge trapping rate, good time-dependent dielectric breakdown, low stress-induced leakage current, and high dielectric breakdown) have also been obtained.

Electrical and reliability characteristics of ZrO2 deposited directly on Si for gate dielectric application

Effects of interfacial layer growth on reactively sputter-deposited TiO2 films were studied. Leakage current was reduced to 10−8 A/cm2 at +1 V after annealing in oxygen ambient and showed tunneling-like temperature dependence. As the interfacial layer grew, interface states and hysteresis were improved significantly. However, the reliability was degraded as the annealing temperature increased.

Effects of interfacial layer growth on the electrical characteristics of thin titanium oxide films on silicon

Zirconium silicate (ZrSixOy) films have been sputtered by comagnetron-reactive sputtering. The composition of ZrSixOy has been controlled by adjusting the sputtering powers of Si and Zr targets to achieve various effective dielectric constants. The sputtered silicate layers showed low equivalent oxide thickness of 14.5 A with a low leakage of 3.3×10−3 A/cm2 at −1.5 V relative to flat band voltage. The silicate films also exhibited good high-temperature stability and smooth interfacial properties on silicon substrate.

Ultrathin zirconium silicate film with good thermal stability for alternative gate dielectric application

High-K dielectric thin films have been investigated as alternative gate dielectrics. Our results suggest that single-layer sputtered ZrO 2 or HfO 2 thin films deposited directly on Si substrate, without the use of a barrier layer, exhibit excellent electrical and reliability characteristics. Equivalent oxide thickness as thin as 9A with leakage current of about 10 -2 A/cm 2 was achieved. This is the lowest EOT value ever reported for ZrO 2 and HfO 2 thin films. Low charge-trapping, high breakdown field (as well as large t bd and Q bd ), and negligible stress-induced leakage currents have also been obtained.

Wen Jie Qi

Papers

Thermal stability and electrical characteristics of ultrathin hafnium oxide gate dielectric reoxidized with rapid thermal annealing

Electrical and reliability characteristics of ZrO2 deposited directly on Si for gate dielectric application

Effects of interfacial layer growth on the electrical characteristics of thin titanium oxide films on silicon

Ultrathin zirconium silicate film with good thermal stability for alternative gate dielectric application

High-K gate dielectrics