There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

[신간의 별자리x] 우리/미술, 그리고 ‘슬픔의 박물관’

Because of the simplicity of design and measurement, as well as the accuracy of results, the 2×-thru de-embedding has replaced the traditional de-embedding algorithms such as thru-reflect-line and short-open-load-thru for printed circuit board (PCB) characterization. In this paper, the theory of [$2^{n}$ -port 2×-Thru de-embedding is derived first. The self-error reduction schemes are introduced to mitigate the de-embedding errors due to non-ideal manufacturing effects that make mode conversion terms non-zero. Both the theory and the self-error reduction schemes are fully validated through simulation and measurement cases.

Multi-Ports ( [$2^{n}$ ) 2×-Thru De-Embedding: Theory, Validation, and Mode Conversion Characterization

S -parameter de-embedding methods require multiple fixtures to be identical. However, due to manufacturing variations, the fixtures are never perfectly identical, which violates the assumptions for the de-embedding algorithms and, in turn, introduces errors. In this article, a novel methodology is proposed to estimate the errors due to de-embedding for practical transmission line measurements. The circuit models of the thru and total lines with fixtures are created. Perturbation in the fixtures is introduced based on the fixture variation estimated by time-domain reflectometry measurements. The method can predict the envelope and estimate the confidence interval of the de-embedded insertion loss using a limited number of simulation cases.

https://ieeexplore.ieee.org/ielam/15/9166805/9104863-aam.pdf

S -Parameter De-Embedding Error Estimation Based on the Statistical Circuit Models of Fixtures

Far-end crosstalk (FEXT) noise is one of the major issues that limits signal integrity performance for high-speed digital products. It is important to estimate the crosstalk noise accurately to avoid noise margin failure or overdesigned transmission lines. Traditionally, analytical formulas for crosstalk noise are based on lossless and perfect impedance match assumptions, which provide limited guidance for a practical high-speed transmission line design. A phenomenon is observed that a lossy conductor increases the FEXT on coupled striplines. To provide a reasonable explanation, analytical and numerical investigations were performed using a modal analysis based approach. A new FEXT component due to the lossy conductor is proposed. Such FEXT component is important to a high-speed stripline design because it is a major contributor when all terminals are matched. To estimate the impact of loss on FEXT, a practical and fast estimation approach is proposed.

Comprehensive and Practical Way to Look at Far-End Crosstalk for Transmission Lines With Lossy Conductor and Dielectric

In this paper, we analyze the impact of characteristic impedance variations among standards on the accuracy of the thru-reflect-line (TRL) calibration technique. The impedance transformer method is adopted to derive the expressions of the calibration coefficient errors due to the manufacturing tolerances. It is found that three factors can affect the magnitude of the errors in the calibration coefficients (c/a and b terms), which are crucial to get the final calibrated results. The first factor is related to the original parameters of the error networks (test fixtures): the larger the insertion losses, the smaller the error in b ; the error in c/a may see an opposite trend if the error network is lossy instead of lossless. The second factor is denoted as the phase contribution (one of the three multipliers of the derived error expression): the magnitude of this error contributing item is approximately equal to the ratio of two hyperbolic sine functions, the variables of which are the length of Line and the length difference between Line and Thru, respectively. The third factor comes from the impedance differences between Thru and Line: the smaller the impedance variation, the smaller the error. The error analysis, presented here, can help engineers evaluate the calibration accuracy by analyzing the error contributing items. It also can be further used to guide test fixture designs to maximize TRL's error immunity to the transmission line characteristic impedance variations.

Thru-Reflect-Line Calibration Technique: Error Analysis for Characteristic Impedance Variations in the Line Standards

Compared to 4-port de-embedding, 8-port de-embedding is much more challenging due to the presence of crosstalk terms in both the differential mode and the common mode. Using the 2nd order mixed-mode concept, this work proposes an 8-port smart fixture de-embedding (SFD) method. The proposed method neglects modal conversion terms by requiring balanced and symmetrical designs. Analysis showed that this approximation generally has negligible impact on the de-embedded differential results with careful test fixture design.

Differential S-Parameter De-embedding for 8-Port Network

Surface roughness of the conductor in transmission lines will introduce extra losses. The recently proposed Huray model is quite accurate for modeling these additional losses by changing R terms in RLGC models. However, only focusing on the loss modeling of the transmission line may lead to causality issues in time domain simulations. In this paper, the causality requirements of the RLGC models are theoretically analyzed firstly. Then, two solutions of the causality problems in Huray model-based transmission line with rough conductors modeling were proposed and compared. One of them is based on the numerical Hilbert transform, and the other one is analytically based on a complex-valued roughness factor. The causalities of those two solutions are validated by a time domain pulse through a transmission line. The results comparisons of the received pulse responses after the transfer functions show that both methods can improve the causality of the wave propagation term significantly, whereas the analytical solution has better performances and the numerical method has some limitations.

Causality Analyzing for Transmission Line with Surface Roughness

SI engineers usually build PCB test coupons and perform cross-sectioning and material properties extraction, and then do design optimization. But designing transmission lines on PCB with good analysis to measurement correlation is really challenging. Although there are some systematic approaches which can be applied to a broad range of applications for highspeed digital designs, it is found that in the validation process, there is always several-ohm mismatch in the comparison of TDR impedance between simulated and measurement results. This degrades engineers' confidence about high-speed design. Taking a real case as an example, this paper is trying to analyze which factors have influence on the trace impedance correlation and showing step by step how the agreement can be improved.

Study of TDR Impedance for Better Analysis to Measurement Correlation

A parallel-plate pair with complex shared antipad structures was analyzed by decomposing it into rectangular local via structures and the plate pair region by virtual interfaces. The rectangle local via structures and the connections between via structures and the plate pair region were rigorously studied. An innovative cavity-based partial-element equivalent-circuit (PEEC) formulation was used to model the rectangle via structures. With special treatment of the reference in the PEEC equivalent circuits, improved circuits model was achieved and all elements of the circuits had clear physical meanings. Furthermore, by enforcing the continuity of the tangential electric fields at the virtual interfaces, the rectangle local via structures were able to connect to the plate region. The impedance parameters of several kinds of rectangle via structures and the whole parallel-plate pair were obtained using the proposed method, and the accuracy of the results was validated with the finite-element solution from a commercial tool.

Xinglin Sun

Papers

Thru-Reflect-Line Calibration Technique: Error Analysis for Characteristic Impedance Variations in the Line Standards

Differential S-Parameter De-embedding for 8-Port Network

Causality Analyzing for Transmission Line with Surface Roughness

Study of TDR Impedance for Better Analysis to Measurement Correlation

Analyzing Multiple Vias in a Parallel-Plate Pair Based on a Nonorthogonal PEEC Method