This review article summarizes the key areas of self-cleaning coatings, primarily focusing on various materials that are widely used in recent research and also in commercial applications. The scope of this article orbits around hydrophobic and hydrophilic coatings, their working mechanism, fabrication techniques that enable the development of such coatings, various functions like Anti-icing, Electro-wetting, Surface switchability and the areas where selfcleaning technology can be implemented. Moreover, different characterization techniques and material testing feasibilities are also analyzed and discussed. Though several companies have commercialized a few products based on self-cleaning coating technology, much potential still remains in this field.

A review on self-cleaning coatings

SiO2 is one of the most abundant materials on Earth. It is cost-effective and also environmentally benign when used as an energy material. Although SiO2 was inactive to Li, it was engineered to react directly by a simple process. It exhibited a strong potential as a promising anode for Li-ion batteries.

Quartz (SiO2): a new energy storage anode material for Li-ion batteries

We study the paired-pulse-induced response of a NiOx-based memristor. The behavior of the memristor is surprisingly similar to the paired-pulse facilitation of a biological synapse. When the memristor is stimulated with a pair of electrical pulses, the current of the memristor induced by the second pulse is larger than that by the first pulse. In addition, the magnitude of the facilitation decreases with the pulse interval, while it increases with the pulse magnitude or pulse width.

/pdf/emulating-the-paired-pulse-facilitation-of-a-biological-1zmf4vfz65.pdf

Emulating the paired-pulse facilitation of a biological synapse with a NiOx-based memristor

The well-known Ebbinghaus forgetting curve, which describes how information is forgotten over time, can be emulated using a NiO-based memristor with conductance that decreases with time after the application of electrical pulses. Here, the conductance is analogous to the memory state, while each electrical pulse represents a memory stimulation or learning event. The decrease in the conductance with time depends on the stimulation parameters, including pulse height and width and the number of pulses, which emulates memory loss behavior well in that the time taken for the memory to be lost depends on how the information is learned.

/pdf/emulating-the-ebbinghaus-forgetting-curve-of-the-human-brain-1li2c8hqyy.pdf

Emulating the Ebbinghaus forgetting curve of the human brain with a NiO-based memristor

A striking correlation between infrared photoinduced absorption spectra and the photoluminescence from silicon nanocrystals indicates that quantized electronic sublevels of the nanocrystals are resonantly coupled to surface vibrational modes via a polarization field produced by coherent longitudinal polar vibrations. Our experimental results and model support the assumption that the mechanism responsible for the efficient photoluminescence from silicon nanocrystals should be assigned to inhibition of nonradiative channels rather than enhancement of radiative channels.

Resonant coupling between surface vibrations and electronic states in silicon nanocrystals at the strong confinement regime.

A structure of indium tin oxide/SiO2 embedded with Ge nanocrystal (nc-Ge)/p-Si substrate was fabricated. The capacitance of the structure can be switched to a high-capacitance or low-capacitance state by an ultraviolet (UV) illumination. The increase (or decrease) in the capacitance is accompanied with the decrease (or increase) in the oxide resistance. The capacitance switching is explained in terms of the UV illumination-induced charging and discharging in the nc-Ge.

/pdf/capacitance-switching-in-sio2-thin-film-embedded-with-ge-1xau249cvc.pdf

Capacitance switching in SiO2 thin film embedded with Ge nanocrystals caused by ultraviolet illumination

Abstract This paper proposes an advanced encryption standard (AES) cryptosystem based on memristive neural network. A memristive chaotic neural network is constructed by using the nonlinear characteristics of a memristor. A chaotic sequence, which is sensitive to initial values and has good random characteristics, is used as the initial key of AES grouping to realize "one-time-one-secret" dynamic encryption. In addition, the Rivest-Shamir-Adleman (RSA) algorithm is applied to encrypt the initial values of the parameters of the memristive neural network. The results show that the proposed algorithm has higher security, a larger key space and stronger robustness than conventional AES. The proposed algorithm can effectively resist initial key-fixed and exhaustive attacks. Furthermore, the impact of device variability on the memristive neural network is analyzed, and a circuit architecture is proposed. 

/pdf/a-dynamic-aes-cryptosystem-based-on-memristive-neural-2m5cqw9r.pdf

A dynamic AES cryptosystem based on memristive neural network

In this paper, we report an investigation of barrier height change in gate oxide caused by charge injection. By analyzing the small change in the post-stress Fowler-Nordheim (FN) tunneling current through the oxide layer,the change of the oxide barrier height due to charge injection is determined quantitatively. The barrier height changes associated with different charge-injection directions and measurement polarities for n-channel metal oxide semiconductor field-effect transistors (MOSFETs) are presented. For comparison a measurement on a p-channel MOSFET is also carried out. For all the cases, the barrier height changes always exhibit a power law dependence on injected charge.

/pdf/barrier-height-change-in-very-thin-sio2-films-caused-by-5b7v9hj3ve.pdf

Barrier Height Change in Very Thin SiO2 Films Caused by Charge Injection

The structure of Si nanocrystals (nc-Si) embedded in SiO2 is promising for achieving optical gain and waveguiding with the advantage of full compatibility with the matured Si technology. In this paper, we report an approach to optical-constant profiling for such a planar waveguide structure formed by Si ion implantation into a SiO2 thin film based on spectroscopic ellipsometry (SE). With the nc-Si optical constants calculated from the Forouhi–Bloomer model and the nc-Si depth profile obtained from secondary ion mass spectroscopy (SIMS) measurements, the optical properties at a given depth are simulated with the Maxwell–Garnett effective medium approximation (EMA). Then an SE fitting is carried out, and the optical constants of nc-Si are extracted from the best fitting. Finally, the depth profile of optical constants of the structure is obtained from the EMA calculation. The result also suggests that the structure has a very low optical loss in the visible to infrared spectral range.

An approach to optical-property profiling of a planar-waveguide structure of Si nanocrystals embedded in SiO2

Many efforts have been made to improve the neuron integration efficiency on neuromorphic chips, such as using emerging memory devices and shrinking CMOS technology nodes. However, in the fully connected (FC) neuromorphic core, increasing the number of neurons will lead to a square increase in synapse & dendrite costs and a high-slope linear increase in soma costs, resulting in an explosive growth of core hardware costs. We propose a co-designed neuromorphic core (SRCcore) based on the quantized spiking neural network (SNN) technology and compact chip design methodology. The cost of the neuron/synapse module in SRCcore weakly depends on the neuron number, which effectively relieves the growth pressure of the core area caused by increasing the neuron number. In the proposed BICS chip based on SRCcore, although the neuron/synapse module implements 1∼16 times of neurons and 1∼66 times of synapses, it only costs an area of 1.79 × 107 F2, which is 7.9%∼38.6% of that in previous works. Based on the weight quantization strategy matched with SRCcore, quantized SNNs achieve 0.05%∼2.19% higher accuracy than previous works, thus supporting the design and application of SRCcore. Finally, a cross-modeling application is demonstrated based on the chip. We hope this work will accelerate the development of cortical-scale neuromorphic systems.

Y. Liu

Papers

Capacitance switching in SiO2 thin film embedded with Ge nanocrystals caused by ultraviolet illumination

A dynamic AES cryptosystem based on memristive neural network

Barrier Height Change in Very Thin SiO2 Films Caused by Charge Injection

An approach to optical-property profiling of a planar-waveguide structure of Si nanocrystals embedded in SiO2

A Co-Designed Neuromorphic Chip With Compact (17.9K F2) and Weak Neuron Number-Dependent Neuron/Synapse Modules