Y
Yao-Wen Chang
Researcher at National Taiwan University
Publications - 403
Citations - 9131
Yao-Wen Chang is an academic researcher from National Taiwan University. The author has contributed to research in topics: Routing (electronic design automation) & Equal-cost multi-path routing. The author has an hindex of 45, co-authored 382 publications receiving 8378 citations. Previous affiliations of Yao-Wen Chang include MediaTek & National Chiao Tung University.
Papers
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Proceedings ArticleDOI
QB-trees: towards an optimal topological representation and its applications to analog layout designs
TL;DR: A new hybrid representation of a quadtree and B*-trees (QB-tree, for short) is presented to handle general geometrical constraints while achieving linear, lower-bound time complexity of module packing and constraint handling.
Journal ArticleDOI
Temperature effect on read current in a two-bit nitride-based trapping Storage Flash EEPROM cell
Mu-Yi Liu,Yao-Wen Chang,N.K. Zous,Ichen Yang,Tao-Cheng Lu,Tahui Wang,Wenchi Ting,J. Ku,Chih-Yuan Lu +8 more
TL;DR: In this article, the temperature effect on the read current of a two-bit nitride-storage flash memory cell was investigated, and the increment of high-V/sub T/state leakage current showed a positive correlation with program/erase threshold voltage window.
Proceedings ArticleDOI
Mixed-cell-height placement considering drain-to-drain abutment
Yu-Wei Tseng,Yao-Wen Chang +1 more
TL;DR: This paper presents the first work to address the mixed-cell-height placement problem by considering the DDA constraint from post global placement throughout detailed placement and proposes a satisfiability-based approach which considers the whole layout to flip a subset of cells and swap pairs of adjacent cells simultaneously.
Journal ArticleDOI
IEEE Standard 1500 Compatible Interconnect Diagnosis for Delay and Crosstalk Faults
TL;DR: It is shown in this paper that the generation algorithm achieves the maximum diagnosability for any interconnect, and two optimization techniques are proposed, an adaptive and a concurrent diagnosis method, to improve the efficiency and effectiveness of interconnect diagnosis.
Proceedings ArticleDOI
FPGA placement and routing
Shih-Chun Chen,Yao-Wen Chang +1 more
TL;DR: The basic architectures of FPGAs are introduced, the placement and routing problems for FPGA are described, and key techniques to solve the problems are explained (including three major placement paradigms: partitioning, simulated annealing, and analytical placement; two routing paradigsms: sequential and concurrent routing, and simultaneous placement and routed).