Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

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High-κ gate dielectrics: Current status and materials properties considerations

Hafnium and zirconium silicate (HfSixOy and ZrSixOy, respectively) gate dielectric films with metal contents ranging from ∼3 to 30 at. % Hf, or 2 to 27 at. % Zr (±1 at. % for Hf and Zr, respectively, within a given film), have been investigated, and films with ∼2–8 at. % Hf or Zr exhibit excellent electrical properties and high thermal stability in direct contact with Si. Capacitance–voltage measurements show an equivalent oxide thickness tox of about 18 A (21 A) for a 50 A HfSixOy (50 A ZrSixOy) film deposited directly on a Si substrate. Current–voltage measurements show for the same films a leakage current of less than 2×10−6 A/cm2 at 1.0 V bias. Hysteresis in these films is measured to be less than 10 mV, the breakdown field is measured to be EBD∼10 MV/cm, and the midgap interface state density is estimated to be Dit∼1–5×1011 cm−2 eV−1. Au electrodes produce excellent electrical properties, while Al electrodes produce very good electrical results, but also react with the silicates, creating a lower e l...

Hafnium and zirconium silicates for advanced gate dielectrics

The outstanding properties of SiO2, which include high resistivity, excellent dielectric strength, a large band gap, a high melting point, and a native, low defect density interface with Si, are in large part responsible for enabling the microelectronics revolution. The Si/SiO2 interface, which forms the heart of the modern metal–oxide–semiconductor field effect transistor, the building block of the integrated circuit, is arguably the worlds most economically and technologically important materials interface. This article summarizes recent progress and current scientific understanding of ultrathin (<4 nm) SiO2 and Si–O–N (silicon oxynitride) gate dielectrics on Si based devices. We will emphasize an understanding of the limits of these gate dielectrics, i.e., how their continuously shrinking thickness, dictated by integrated circuit device scaling, results in physical and electrical property changes that impose limits on their usefulness. We observe, in conclusion, that although Si microelectronic devices...

Ultrathin (<4 nm) SiO2 and Si-O-N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits

A method for growing films for use in integrated circuits using atomic layer deposition and a subsequent converting step is described. In an embodiment, the subsequent converting step includes oxidizing a metal atomic layer to form a metal oxide layer. The atomic layer deposition and oxidation step are then repeated to produce a metal oxide layer having sufficient thickness for use as a metal oxide layer in an integrated circuit. The subsequent converting step, in an embodiment, includes converting the atomic deposition layer by exposing it to one of nitrogen to form a nitride layer, carbon to form a carbide layer, boron to form a boride layer, and fluorine to form a fluoride layer. Systems and devices for performing the method, semiconductor devices so produced, and machine readable media containing the method are also described.

Atomic layer deposition and conversion

An atomic layer deposited dielectric layer and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. Depositing a hafnium metal layer on a substrate surface by atomic layer deposition and depositing a hafnium oxide layer on the hafnium metal layer by atomic layer deposition form a hafnium oxide dielectric layer substantially free of silicon oxide. Dielectric layers containing atomic layer deposited hafnium oxide are thermodynamically stable such that the hafnium oxide will have minimal reactions with a silicon substrate or other structures during processing.

Electronic apparatus with deposited dielectric layers

The formation of voids on the thermally grown (650 °C) ultrathin (∼1 nm) silicon oxide films on the Si(100) surface was investigated by using ultrahigh vacuum scanning tunneling microscopy. Voids form randomly on the ultrathin oxide film upon thermal annealing at 750 °C. In contrast to void formation observed on thicker (>5 nm) thermal silicon oxide films and that observed on ultrathin (∼1 nm) oxide films formed by room temperature O2 adsorption, the number of voids increases during annealing. We find that Si monomer creation and SiO production compete kinetically in the void formation process.

Void formation on ultrathin thermal silicon oxide films on the Si(100) surface

Two methods for producing Si-oxide barriers upon which crystalline Si layers can be grown are presented. One method entails oxide island nucleation on a clean vicinal Si(001) surface. The second method makes use of void formation in ultrathin oxides on the Si(100) surface at elevated temperatures. Either method results in an oxide barrier which is porous and the exposed Si within these pores can serve as a way to seed c-Si overgrowth. We demonstrate that it is feasible to grow crystalline Si overlayers on top of such porous oxide barriers, while on the continuous Si-oxide surface, only amorphous or nanocrystalline Si layer overgrowth can be achieved. The controlled oxide growth and Si overgrowth on the oxide can find possible applications in Si-based resonant tunneling devices, optoelectronics, and other Si-based nanoelectronics.

Controlled growth of SiO2 tunnel barrier and crystalline Si quantum wells for Si resonant tunneling diodes

We have developed a method for removing oxides and producing atomically flat Si(100) surfaces with single atomic height steps using a Si flux cleaning technique. By introducing a Si flux in the range 1.0–1.5 A/s at the onset of an SiO2 thermal desorption step as low as 780 °C, scanning tunneling microscopy (STM) and atomic force microscopy images reveal smooth surfaces with atomically flat terraces with an rms roughness of 0.5 A and single-step heights of 1.4 A. STM reveals that A- and B-type steps are present across the entire area of the scanned surface. Desorption of the surface oxide layer with Si fluxes below this range results in rougher surfaces with pits ∼50 A deep and 1000 A across. For Si fluxes above this range, no pits are seen but atomic steps are not visible on the surface.

In situ Si flux cleaning technique for producing atomically flat Si(100) surfaces at low temperature

A method of preparing a surface for and forming a thin film on a single-crystal silicon substrate is disclosed. One embodiment of his method comprises forming an oxidized silicon layer (which may be a native oxide) on at least one region of the substrate, and thermally annealing the substrate in a vacuum while supplying a silicon-containing flux to the oxide surface, thus removing the oxidized silicon layer. Preferably, the thin film is formed immediately after removal of the oxidized silicon layer. The silicon-containing flux is preferably insufficient to deposit a silicon-containing layer on top of the oxidized silicon layer, and yet sufficient to substantially inhibit an SiO-forming reaction between the silicon substrate and the oxidized silicon layer. The method of the invention allows for growth or deposition of films which have exceptionally smooth interfaces (less than 0.1 nm rms roughness) with the underlying silicon substrate at temperatures less than 800° C., and is ideally suited for deposition of ultrathin films having thicknesses less than about 5 nm.

Method for thin film deposition on single-crystal semiconductor substrates

A method of making a semiconductor device and the device. The device, according to a first embodiment, is fabricated by providing a silicon (111) surface, forming on the surface a dielectric layer of crystalline silicon nitride and forming an electrode layer on the dielectric layer of silicon nitride. The silicon (111) surface is cleaned and made atomically flat. The dielectric layer if formed of crystalline silicon nitride by placing the surface in an ammonia ambient at a pressure of from about 1×10−7 to about 1×10−5 Torr at a temperature of from about 850° C. to about 1000° C. The electrode layer is heavily doped silicon. According to a second embodiment, there is provided a silicon (111) surface on which is formed a first dielectric layer of crystalline silicon nitride having a thickness of about 2 monolayers. A second dielectric layer compatible with silicon nitride and having a higher dielectric constant than silicon nitride is formed on the first dielectric layer and an electrode layer is formed over the second dielectric layer. A third dielectric layer of silicon nitride having a thickness of about 2 monolayers can be formed between the second dielectric layer and the electrode layer. The second dielectric layer is preferably taken from the class consisting of tantalum pentoxide, titanium dioxide and a perovskite material. Both silicon nitride layers can be formed as in the first embodiment. The electrode layer is preferably heavily doped silicon

Yi Wei

Papers

Void formation on ultrathin thermal silicon oxide films on the Si(100) surface

Controlled growth of SiO2 tunnel barrier and crystalline Si quantum wells for Si resonant tunneling diodes

In situ Si flux cleaning technique for producing atomically flat Si(100) surfaces at low temperature

Method for thin film deposition on single-crystal semiconductor substrates

Process to produce ultrathin crystalline silicon nitride on Si(111) for advanced gate dielectrics