Journal ArticleDOI
In situ Si flux cleaning technique for producing atomically flat Si(100) surfaces at low temperature
TLDR
In this article, a Si flux in the range 1.0-1.5 A/s at the onset of an SiO2 thermal desorption step as low as 780 °C was used to remove oxides and produce atomically flat Si(100) surfaces with single atomic height steps.Abstract:
We have developed a method for removing oxides and producing atomically flat Si(100) surfaces with single atomic height steps using a Si flux cleaning technique. By introducing a Si flux in the range 1.0–1.5 A/s at the onset of an SiO2 thermal desorption step as low as 780 °C, scanning tunneling microscopy (STM) and atomic force microscopy images reveal smooth surfaces with atomically flat terraces with an rms roughness of 0.5 A and single-step heights of 1.4 A. STM reveals that A- and B-type steps are present across the entire area of the scanned surface. Desorption of the surface oxide layer with Si fluxes below this range results in rougher surfaces with pits ∼50 A deep and 1000 A across. For Si fluxes above this range, no pits are seen but atomic steps are not visible on the surface.read more
Citations
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High-κ gate dielectrics: Current status and materials properties considerations
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Journal ArticleDOI
Hafnium and zirconium silicates for advanced gate dielectrics
TL;DR: In this article, a gate dielectric film with metal contents ranging from ∼3 to 30 at. % Hf and Zr has been investigated, and the results show that Hf exhibits excellent electrical properties and high thermal stability in direct contact with Si, while Al electrodes produce very good electrical properties, but also react with the silicates.
Journal ArticleDOI
Ultrathin (<4 nm) SiO2 and Si-O-N gate dielectric layers for silicon microelectronics: Understanding the processing, structure, and physical and electrical limits
TL;DR: In this paper, the authors summarized recent progress and current scientific understanding of ultrathin (<4 nm) SiO2 and Si-O-N (silicon oxynitride) gate dielectrics on Si-based devices.
Journal ArticleDOI
Mechanism of cleaning Si(100) surface using Sr or SrO for the growth of crystalline SrTiO3 films
Yi Wei,Xiaoming Hu,Yong Liang,Dirk Jordan,B. Craigo,Ravi Droopad,Zhiyi Jimmy Yu,Alexander A. Demkov,John L. Edwards,William J. Ooms +9 more
TL;DR: In this paper, a method for removing SiO2 and producing an ordered Si(100) surface using Sr or SrO has been developed, which is well suited for the growth of crystalline high-k dielectric SrTiO3 films.
Journal ArticleDOI
Frequency dispersion reduction and bond conversion on n-type GaAs by in situ surface oxide removal and passivation
Christopher L. Hinkle,A. M. Sonnet,Eric M. Vogel,Stephen McDonnell,G. Hughes,M. Milojevic,Bong-Ki Lee,Francisco S. Aguirre-Tostado,K. J. Choi,Jiyoung Kim,Robert M. Wallace +10 more
TL;DR: The method of surface preparation on n-type GaAs, even with the presence of an amorphous-Si interfacial passivation layer, is shown to be a critical step in the removal of accumulation capacitance frequency dispersion as mentioned in this paper.
References
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Journal ArticleDOI
1.5 nm direct-tunneling gate oxide Si MOSFET's
Hiroki Sasaki,Mizuki Ono,Takashi Yoshitomi,Tatsuya Ohguro,S. Nakamura,Masanobu Saito,Hiroshi Iwai +6 more
TL;DR: In this paper, a 1.5 nm direct-tunneling gate oxide was used to achieve a transconductance of more than 1,000 mS/mm at a gate length of 0.09 /spl mu/m at room temperature.
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Journal ArticleDOI
Kinetics of high-temperature thermal decomposition of SiO2 on Si(100)
TL;DR: In this article, the decomposition of oxide films of 50 to 500 A on Si(100) during ultrahigh vacuum anneal has been studied in a scanning Auger microscope, in which voids form in the oxide and grow laterally with time and temperature.
Journal ArticleDOI
Reliability of thin SiO2
K.F. Schuegraf,Chenming Hu +1 more
TL;DR: In this paper, a comprehensive framework for evaluating measured SiO2 breakdown data which enables assurance of built-in oxide reliability for scaled MOS technologies is presented. But, the authors do not discuss an integrative view for explaining the many diverse observations about the process of oxide wearout and failure.
Journal ArticleDOI
Oxidation of silicon: the VLSI gate dielectric
C J Sofield,A M Stoneham +1 more
TL;DR: In this paper, the authors discuss the current unified model for silicon oxidation, which goes beyond the traditional descriptions of kinetic and ellipsometric data by explicitly addressing the issues raised in isotope experiments.