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Author

Yu. Gornoushkin

Bio: Yu. Gornoushkin is an academic researcher. The author has contributed to research in topics: CMOS sensor & Pixel. The author has an hindex of 1, co-authored 1 publications receiving 121 citations.

Papers
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Journal ArticleDOI
15 Oct 2000
TL;DR: In this paper, a monolithic active pixel sensor (MAPS) for charged particle tracking based on a novel detector structure was proposed, simulated, fabricated and tested, which is inseparable from the readout electronics, since both of them are integrated onto the same, standard for a CMOS process.
Abstract: A monolithic active pixel sensor (MAPS) for charged particle tracking based on a novel detector structure was proposed, simulated, fabricated and tested. The detector designed accordingly to this idea is inseparable from the readout electronics, since both of them are integrated onto the same, standard for a CMOS process, low-resistivity silicon wafer. The individual pixel is comprised of only 3 MOS transistors and a photodiode collecting the charge created in a thin undepleted epitaxial layer. This approach provides the whole detector surface sensitive to radiation (100% fill factor) with reduced pixel pitch(very high spatial resolution). This yields a low cost, high resolution and thin detecting device. The detailed device simulations using an ISE-TCAD package have been carried out in order to study a charge collection mechanism and to validate the proposed idea. Consequently, two prototype chips have been fabricated using 0.6 /spl mu/m and 0.35 /spl mu/m CMOS processes. Special radiation tolerant layout techniques were used in the second chip design. Both chips were tested and fully characterised. The pixel conversion gain was calibrated using 5.9 keV photons and prototype devices were exposed to the 120 GeV/c pion beams at CERN. Obtained results preceded by general design ideas and simulation results are reviewed.

123 citations


Cited by
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Journal ArticleDOI
TL;DR: In this article, the authors present results from tests performed with relativistic charged particles on prototypes essentially fabricated with a classical 3-transistor pixel configuration and two novel ideas optimising the pixel design for a vertex detector have been developed.
Abstract: Monolithic active pixel sensors introduce a detection technique, where the active detecting element is a thin, moderately doped, and undepleted silicon layer and the readout electronics is implanted on top of it. The built-in potential, resulting from differences in doping, screens both parts, as well as it confines the charge diffusing to the readout electrodes. The R&D was triggered by the increasing need of high performance flavour identification capabilities that should be provided by future vertex detectors. The viability of the technology and its high tracking performances were demonstrated with small-scale prototypes, made of small arrays of a few thousands of pixels and more recently with a first prototype of a serviceable size of one million pixels. This paper summarizes results from tests performed with relativistic charged particles on prototypes essentially fabricated with a classical 3-transistor pixel configuration. Within the last year, two novel ideas optimising the pixel design for a vertex detector have been developed. They are presented with test results assessing their suitability.

68 citations

Journal ArticleDOI
TL;DR: Characterization of monolithic active pixel sensors (MAPS) in a scanning electron microscope (SEM) as well as in a transmission electron microscopy (TEM) using the MIMOSA V (MV) chip is discussed.

66 citations

Posted Content
TL;DR: A high-level model of CCD and CMOS photosensors based on a literature review is formulated and can be used to create synthetic images for testing and validation of image processing algorithms in the presence of realistic images noise.
Abstract: In many applications, such as development and testing of image processing algorithms, it is often necessary to simulate images containing realistic noise from solid-state photosensors. A high-level model of CCD and CMOS photosensors based on a literature review is formulated in this paper. The model includes photo-response non-uniformity, photon shot noise, dark current Fixed Pattern Noise, dark current shot noise, offset Fixed Pattern Noise, source follower noise, sense node reset noise, and quantisation noise. The model also includes voltage-to-voltage, voltage-to-electrons, and analogue-to-digital converter non-linearities. The formulated model can be used to create synthetic images for testing and validation of image processing algorithms in the presence of realistic images noise. An example of the simulated CMOS photosensor and a comparison with a custom-made CMOS hardware sensor is presented. Procedures for characterisation from both light and dark noises are described. Experimental results that confirm the validity of the numerical model are provided. The paper addresses the issue of the lack of comprehensive high-level photosensor models that enable engineers to simulate realistic effects of noise on the images obtained from solid-state photosensors.

60 citations

Journal ArticleDOI
TL;DR: In this article, a standard CMOS 0.25 mum digital process is used to design a test chip which includes different pixel types, column-level discriminators, and a fully programmable digital sequencer.
Abstract: In order to develop precision vertex detectors for the future linear collider, fast monolithic active pixel sensors are studied. A standard CMOS 0.25 mum digital process is used to design a test chip which includes different pixel types, column-level discriminators, and a fully programmable digital sequencer. In-pixel amplification is implemented together with double sampling. Different charge-to-voltage conversion factors were obtained using amplifiers with different gains or diode sizes. Pixel architectures with dc and ac coupling to charge sensing element were proposed. Hits from conversion of 55Fe photons were recorded for the dc-coupled and ac-coupled pixel versions. Double sampling is functional and allows almost a complete cancellation of fixed pattern noise

58 citations

Journal ArticleDOI
TL;DR: In this article, the feasibility of a new implementation of CMOS monolithic active pixel sensors (MAPS) for applications to charged particle tracking is studied. But the authors focus on the front-end of the front end of the system, which relies upon a charge sensitive amplifier (CSA), embedded in the elementary pixel cell.
Abstract: This work studies the feasibility of a new implementation of CMOS monolithic active pixel sensors (MAPS) for applications to charged particle tracking. As compared to standard three MOSFET MAPS, where the charge signal is readout by a source follower, the proposed front-end scheme relies upon a charge sensitive amplifier (CSA), embedded in the elementary pixel cell, to perform charge-to-voltage conversion. The area required for the integration of the front-end electronics is mostly provided by the collecting electrode, which consists of a deep n-type diffusion, available as a shielding frame for n-channel devices in deep submicron, triple well CMOS technologies. Based on the above concept, a chip, which includes several test structures differing in the sensitive element area, has been fabricated in a 0.13 μ m CMOS process. In this paper, the criteria underlying the design of the pixel level analog processor will be presented, together with some preliminary experimental results demonstrating the feasibility of the proposed approach.

55 citations