Institution
Infinera
Company•Sunnyvale, California, United States•
About: Infinera is a company organization based out in Sunnyvale, California, United States. It is known for research contribution in the topics: Photonic integrated circuit & Signal. The organization has 598 authors who have published 723 publications receiving 10651 citations. The organization is also known as: Infinera Corporation.
Topics: Photonic integrated circuit, Signal, Node (networking), Waveguide (optics), Optical cross-connect
Papers published on a yearly basis
Papers
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24 Mar 2004TL;DR: In this article, a bias is applied to the isolation region so that any parasitical current path developed between adjacent active or passive optical components, now separated by an isolation region, is established through the electrical isolation region and clamped to the bias, V C.
Abstract: A method of electrically isolating and operating electro-optical components integrated in a monolithic semiconductor photonic chip, such as an EML or PIC chip. A bias, V C , is applied to the isolation region so that any parasitical current path developed between adjacent active or passive optical components, now separated by an isolation region, is established through the electrical isolation region and clamped to the bias, V C . The applied bias, V C , may be a positive bias, a negative bias, or a zero or a ground bias. The electrical isolation regions are formed by spatial current blocking regions formed at adjacent sides of the electrical isolations region transverse to a direction of light propagation through the optical components, or between the electrical isolation regions and adjacent optical components. The spatial current blocking regions may be comprised of a pair of spatially disposed trenches or ion implanted regions or high resistance implanted regions.
28 citations
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TL;DR: This article will provide an overview of multicasting in the context of SDNs, discuss tree planning and management, discuss multicast routing and traffic engineering, reliability and scalability in routing and multicast techniques in data centers, and identify open challenges for SDN multicasting and outline future research directions.
28 citations
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04 Apr 2011TL;DR: In this paper, a distribution engine is configured to execute processor executable code to cause the distribution engine to read a first bit and a second bit from the virtual queue, and then provide the first bits and the second bit to at least one optical port for transmission to a first predetermined group of the plurality of circuits.
Abstract: A node comprising a packet network interface, an ethernet switch, an optical port, and a distribution engine. The packet network interface adapted to receive a packet having a destination address and a first bit and a second bit. The ethernet switch is adapted to receive and forward the packet into a virtual queue associated with a destination. The optical port has circuitry for transmitting to a plurality of circuits. The distribution engine has one or more processors configured to execute processor executable code to cause the distribution engine to (1) read a first bit and a second bit from the virtual queue, (2) provide the first bit and the second bit to the at least one optical port for transmission to a first predetermined group of the plurality of circuits.
28 citations
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20 May 2003TL;DR: In this article, a planar waveguide core having submicron core spacings is covered by a subsequently-deposited cladding layer without cladding gaps, seams or other deleterious cladding defects.
Abstract: The integrated optical circuit of the present invention includes a substrate with a first cladding layer. A first core layer having one or more waveguiding elements is formed on the first cladding layer. A second cladding layer surrounds the waveguiding elements of the first core layer; the refractive index of the first and second cladding layers are selected to be less than the refractive index of the waveguiding element(s). Through simultaneous cladding material deposition and cladding material removal, the second cladding layer as deposited is substantially self-planarized, enabling further layers to be positioned on the second cladding layer without necessitating intermediate planarization. Further, the present invention permits planar waveguide cores having submicron core spacings to be covered by a subsequently-deposited cladding layer without cladding gaps, seams or other deleterious cladding defects.
27 citations
Authors
Showing all 627 results
Name | H-index | Papers | Citations |
---|---|---|---|
Brent E. Little | 72 | 466 | 17942 |
Sai T. Chu | 69 | 479 | 16548 |
David F. Welch | 44 | 246 | 6352 |
Fred A. Kish | 43 | 216 | 6665 |
Andrew Dentai | 42 | 198 | 5298 |
Richard P. Schneider | 40 | 174 | 5775 |
Scott W. Corzine | 39 | 151 | 7942 |
Radhakrishnan Nagarajan | 36 | 166 | 4741 |
Amir Hosseini | 35 | 170 | 3440 |
David G. Mehuys | 34 | 131 | 3587 |
David F. Welch | 33 | 91 | 2973 |
Mark J. Missey | 30 | 118 | 2936 |
Frank H. Peters | 30 | 278 | 3937 |
Mehrdad Ziari | 29 | 156 | 3086 |
Jeffrey T. Rahn | 29 | 151 | 2433 |