Institution
SunEdison
Company•Belmont, California, United States•
About: SunEdison is a company organization based out in Belmont, California, United States. It is known for research contribution in the topics: Wafer & Silicon. The organization has 757 authors who have published 1072 publications receiving 13153 citations. The organization is also known as: MEMC Electronic Materials & SunEdison LLC.
Topics: Wafer, Silicon, Ingot, Vacancy defect, Layer (electronics)
Papers published on a yearly basis
Papers
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16 May 2014
TL;DR: The development of redox-flow-battery technology including recent advances in new redox active materials, cell designs, and systems are reviewed from the perspective of engineers interested in applying this technology.
Abstract: Redox flow batteries are well suited to provide modular and scalable energy storage systems for a wide range of energy storage applications. In this paper, we review the development of redox-flow-battery technology including recent advances in new redox active materials, cell designs, and systems, all from the perspective of engineers interested in applying this technology. We discuss cost, performance, and reliability metrics that are critical for deployment of large flow-battery systems. The technology, while relatively young, has the potential for significant improvement through reduced materials costs, improved energy efficiency, and significant reduction in the overall system costs.
193 citations
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TL;DR: In this article, a consistent picture of intrinsic point defect behavior is produced by taking into account a wide variety of recent results from studies of silicon crystal growth and high temperature wafer heat treatments.
Abstract: Taking into account a wide variety of recent results from studies of silicon crystal growth and high temperature wafer heat treatments, a consistent picture of intrinsic point defect behavior is produced. The relevant point defect parameters: diffusivities, equilibrium concentrations and the details of the interaction of vacancies with oxygen are deduced. This set of parameters successfully explains a very wide array of experimental observations covering the temperature range 900–1410 °C. These experimental observations, which are reviewed here, include the properties of grown-in microdefects and vacancy-controlled oxygen precipitation effects in rapidly cooled wafers. The analysis of point defect behavior from observations of high temperature phenomena such as these has the great advantage of relative simplicity and transparency.
189 citations
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04 Apr 1996TL;DR: In this paper, a susceptor is used for holding semiconductor wafers in a barrel reactor for chemical vapor deposition of material on the wafer having a baffle for reducing the amount of material deposited at the bottom of the lowest wafer held in the susceptor.
Abstract: A susceptor for holding semiconductor wafers in a barrel reactor for chemical vapor deposition of material on the wafers having a baffle for reducing the amount of material deposited at the bottom of the lowest wafers held in the susceptor. The baffle includes a plate mounted on the bottom of the susceptor and a deflector for each wall of the susceptor. The deflectors each have the shape of a chordal section of a cylinder and are mounted on the plate against a respective wall of the susceptor below the lowest wafer-holding recess on that wall of the susceptor.
177 citations
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TL;DR: In this paper, a model of multi-step vacancy aggregation in dislocation-free silicon crystals is analyzed, where voids are first nucleated (normally just below 1100°C) and the vacancy loss to voids is retarded below some characteristic temperature (about 1020°C).
160 citations
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TL;DR: In this article, the authors present the observation of subsurface cracks in silicon wafers machined by surface grinding process and investigate the effects of sample location on crack depth.
Abstract: Silicon wafers are used for production of most microchips. Various processes are needed to transfer a silicon crystal ingot into wafers. To ensure high surface quality, the damage layer generated by each of the machining processes (such as lapping and grinding) has to be removed by its subsequent processes. Therefore it is essential to assess the subsurface damage for each machining process. This paper presents the observation of subsurface cracks in silicon wafers machined by surface grinding process. Based on cross-sectional microscopy methods, several crack configurations are identified. Samples taken from different locations on the wafers are examined to investigate the effects of sample location on crack depth. The effects of grinding parameters such as feedrate and wheel rotational speed on the depth of subsurface crack have been studied by a set of factorial design experiments. Furthermore, the relation between the depth of subsurface crack and the wheel grit size is experimentally determined.
150 citations
Authors
Showing all 757 results
Name | H-index | Papers | Citations |
---|---|---|---|
Zhijian Pei | 44 | 231 | 6415 |
Tae Hoon Kim | 39 | 573 | 6444 |
Robert J. Falster | 29 | 236 | 3390 |
Vikas Tomar | 29 | 183 | 2267 |
Vikas Berry | 27 | 75 | 5431 |
Henry Hieslmair | 25 | 80 | 2465 |
Babu R. Chalamala | 21 | 56 | 3031 |
Easan Drury | 20 | 30 | 1521 |
Shawn G. Thomas | 19 | 88 | 1552 |
Gregory M. Wilson | 17 | 32 | 1092 |
Gang Wang | 17 | 45 | 895 |
Robert Falster | 17 | 39 | 928 |
Vladimir V. Voronkov | 17 | 107 | 1329 |
A. Giannattasio | 15 | 37 | 772 |
Milind S. Kulkarni | 15 | 43 | 567 |