Showing papers in "IEEE Transactions on Consumer Electronics in 1992"

The JPEG still picture compression standard

Abstract: A joint ISO/CCITT committee known as JPEG (Joint Photographic Experts Group) has been working to establish the first international compression standard for continuous-tone still images, both grayscale and color. JPEG's proposed standard aims to be generic, to support a wide variety of applications for continuous-tone images. To meet the differing needs of many applications, the JPEG standard includes two basic compression methods, each with various modes of operation. A DCT (discrete cosine transform)-based method is specified for 'lossy' compression, and a predictive method for 'lossless' compression. JPEG features a simple lossy technique known as the Baseline method, a subset of the other DCT-based modes of operation. The Baseline method has been by far the most widely implemented JPEG method to date, and is sufficient in its own right for a large number of applications. The author provides an overview of the JPEG standard, and focuses in detail on the Baseline method. >

Active badges and personal interactive computing objects

Abstract: The authors describe a family of personal active badges developed for location of people and devices in the computer environment. Applications include location and paging of individuals as well as control of computer systems. Active badges are one type of a range of portable computers connected to cordless communication systems that can now be made. Because of their small size and application such devices are referred to as personal interactive computing objects. A speculative discussion of how such devices may be used in the traditional computing environment is given. >

Error concealment in digital simulcast AD-HDTV decoder

Abstract: The authors describe strategies developed for concealment of channel errors in the advanced digital high-definition television (AD-HDTV) system. Error concealment performed at the receiver was supported by a custom transport structure which reliably detects errors and helps identify the picture area in which compressed information is lost. The error concealment processor then attempts to repair the damaged portions of the pictures by exploiting spatial and temporal redundancies in the received and reconstructed video signals. These concealment procedures, combined with prioritized data encoding, enabled the AD-HDTV system to deliver acceptable image quality under severely impaired reception conditions, while delivering superb quality under typical transmission impairments. >

Integrating virtual reality, tele-conferencing, and entertainment into multimedia home computers

Abstract: It is pointed out that the integration of virtual reality techniques with multimedia teleconferencing leads to the development of tele-virtual conferencing systems, which synthesize panoramic, life-like three-dimensional video images and stereophonic audio. The authors investigate the architectural requirements of such systems and propose a high-level design of an intelligent multimedia interface unit (IMIU) capable of supporting tele-virtual conferencing in multimedia home computers. The IMIU is capable of supporting panoramic, life-like three-dimensional video images and stereophonic audio, so as to synthesize tele-virtual conferencing environments. >

The full motion system for CD-I

Abstract: Compact disc interactive (CD-I) is a multimedia system for home entertainment, education, training, publishing, and other applications that combine audio, video, text, graphics, animation, and interactivity. A full motion system is defined to extend CD-I with the capability to play moving natural pictures on full screen with associated audio of compact disc quality. To play full motion sequences from the CD-I disc requires compression of the audiovisual information to the CD-I bitrate. The full motion system applies a compression method based on the MPEG standard. The features of the CD-I full motion system, application of the MPEG standard for full motion, and the architecture of a full motion CD-I player are described. >

An arctangent type wideband PM/FM demodulator with improved performance

Abstract: Hagiwara and Nakagawa (1985, 1986) added a jump detector at the output of an arctangent-type baseband FM demodulator in order to transform this intrinsic narrowband demodulator into a wideband one. It is shown in the present work that the performance of the Hagiwara and Nakagawa wideband FM demodulator can be improved, at low input signal-to-noise ratio, by placing the jump detector before, rather than after, the differentiator. An alternative jump detector is also presented. >

A neural network based image compression system

Abstract: It is proposed that vector quantization be implemented for image compression based on neural networks. Separate codebooks for edge and background blocks are designed using Kohonen (1984) self-organizing feature maps to preserve edge integrity and improve the efficiency of codebook design. A system architecture is proposed, and satisfactory performance is achieved. >

Time-scale modification of speech signals using cross-correlation functions

Abstract: A high-performance method of modifying the time scale of speech signals into an arbitrary time scale was developed. It requires substantially reduced arithmetic operations. This process is performed within a time domain where the time-scale expansion or compression is performed by inserting or substituting composite segments into or from an original input signal, and the length of the segment is optimized by an objective evaluation process. A monosyllable articulation test comparing this method with a conventional time-scale modification method performed by a simple modification of sampling frequency proved that there are definite advantages to using the new method. >

Value based home automation for todays' market

Abstract: The author discusses the reasons why home automation has failed to date. The perception that home automation systems are unreliable is addressed. The potential of the home automation market is explored. It is argued that the reason why home automation has not succeeded is still mostly cost. The cost threshold has not been reached for the most important market segment, which is upper-middle income people. High-income homeowners have achieved this cost threshold and other reasons explain their disinterest. Contributors are not only the manufacturing cost of the product, but also the development, installation, service, and support costs. Another factor is poor user interfaces. Developments in a number of areas which help to address these failings are discussed. In particular, utility automation is considered to affect this market significantly. >

A motion estimator for low bit-rate video codec

Abstract: A novel component performing motion estimation is presented. This chip is designed based on the three-step hierarchical search block-matching algorithm and can be applied to image communication on ISDN (integrated services digital network) (H.261 standard), MPEG, TV transmission, HDTV (high-definition television), etc. The practical architectural design techniques and the chip features are discussed. This component has the following features: unified execution steps, low latency delay, low I/O bandwidth, regular hardware structure, and single-chip or cascaded configurations. >

A codec for HDTV

Abstract: A high-quality digital video codec has been developed for the Zenith/AT&T HDTV system. It adaptively selects between two transmission modes with differing rates and robustness. The codec works on an image progressively scanned with 1575 scan lines every 1/30th of a second and achieves a compression ratio of approximately 50 to 1. The high compression ratio facilitates robust transmission of the compressed HDTV signal within an NTSC taboo channel. Transparent image quality is achieved using motion compensated transform coding coupled with a perceptual criterion to determine the quantization accuracy required for each transform coefficient. The codec has been designed to minimize complexity and memory in the receiver. >

Interlaced to progressive scan conversion for HD-MAC application

Abstract: A multilevel nonlinear filter for simultaneous edge detection and noise suppression called a nested median filter/median averaging filter (NMF/MAF) pair is introduced. On the basis of the NMF/MAF pair, an interlaced-to-progressive (I/P) conversion is proposed to estimate motion vectors in the 40-ms mode of the HD-MAC system. Test results for HD-MAC applications confirmed that the proposed I/P conversion scheme was robust in preserving sharp edges, inhibiting edge shifting, and suppressing impulsive noise. The motion compensation interpolated HD-MAC image sequence with the proposed I/P conversion scheme showed 4 approximately 6 dB to the improvement in peak SNR (peak signal-to-noise ratio) compared to the interlaced scheme. A structural overview for implementation of the NMF/MAF integrated circuit is described. The features of this circuit are an integrated dynamic RAM based on horizontal line memories, a high-speed bubble sorter, and a window option circuit. >

Router connected physical media in networking the intelligent home

Abstract: The performance of the CEBus, a proposed computer network standard for the intelligent home, implemented with power line (PL) and twisted pair (TP) media, interconnected through a router, has been investigated. The delay and throughput characteristics of each of the three priority class of messages, i.e. deferred, standard, and high, have been measured. Overall, the PL-Router-TP network system has behaved well and as expected, however, care must be taken to restrict traffic from the high (TP) to the low (PL) capacity medium to reasonable levels from the point of view of the low capacity medium. >

A 2-D integer cosine transform chip set and its applications

Abstract: An integer cosine transform denoted ICT (10,9,6,2,9,3) has been shown to be a promising alternative discrete cosine transform (DCT) for its implementation simplicity, close performance, and compatibility to the DCT. The authors describe a hardware realization of the 2D-ICT (10,9,6,2,9,3) using two custom designed chips, referred to as the ICT chip and a data sequencer chip. Both chips were implemented on a 3- mu m gate array with 2800 gates. The chip set can compute 2D order-8 ICT in less than 19 mu s. The speed can be even faster in inverse transform if high-sequence coefficients are truncated. An image processing unit based on this chip set has also been developed which is useful in image archiving systems such as electronic albums. >

A residential energy management test using CEBus

Abstract: A test project undertaken for the testing of evaluation of commercial home automation systems and technologies for applicability to residential energy management is discussed. The project consisted of a cooperative program between an electric utility, several major homebuilders, and various appliance manufacturers. Performance and reliability experiments were conducted in residential environments using the proposed CEBus (consumer electronics bus) standard on powerline. Also, an electrical load management system was constructed and tested. >

Design of a superregenerative receiver for solar powered applications

Abstract: The design of an inexpensive superregenerative radio receiver suitable for battery or solar powered operation in remote control applications where traditional sources of power are unavailable is discussed. Power consumption is held to a minimum without sacrificing receiver sensitivity by providing minimal biasing to discrete devices and by utilizing low power CMOS integrated circuits wherever practical. Supply current varies from a minimum value of 0.8 mA to a maximum value of 1.8 mA over the supply voltage range of 4.0 to 5.4 V. Power consumption at the nominal battery voltage of 4.8 V is less than seven mW, with a current of 1.4 mA. Receiver sensitivity, when defined as the minimum modulated source voltage required to produce a reliable demodulated digital output signal, is a consistent 1 mu V over the supply voltage range. Receiver bandwidth at the minimum signal level of 1 mu V is 700 kHz. Bandwidth increases to 2.0 MHz for a 10 mu V input signal. >

Design aspects and performance evaluation of ATCS mobile data link

Abstract: A mobile data link system for the North American Advanced Train Control System (ATCS) is proposed and analyzed with respect to the ATCS preliminary requirements. Design aspects of mobile data radios are discussed to point out the hardware limitations due to regulations and technologies. The propagation characterization of the channel is investigated. (1) The RF field strength coverage of a base station predicted for urban, suburban, quasi-open, and open environments, is given. (2) Multipath fading models are given. The probabilities of success for a single try as a function of received signal levels are presented for different train speeds. (3) System bit error rates (BERs) for different cases are shown. The use of Reed-Solomon codes for forward error correction is also included to show the improvement of the system performance. >

Envelope detection of vestigial sideband TV signals with carrier reinsertion

Abstract: A model to investigate the envelope detection of vestigial sideband TV signals with nonideal carrier reinsertion is presented. For a typical television test waveform, the amplitude and phase distortions at the output of the envelope detector are calculated as a function of the reinserted carrier amplitude and phase. For given specifications in terms of differential gains and differential phase, the relation between minimum permitted carrier amplitude and maximum permitted carrier phase error is established. This technique permits circuit design without the need for large-scale testing. >

Determination of the optimum packet length and buffer sizes for the consumer electronics bus

Abstract: Two issues related to the implementation of the consumer electronics bus (CEBus) on a power line medium are considered. These are the determination of (a) optimum packet length and (b) optimum buffer size. The delay-throughput characteristics of each of the three priority classes of messages, i.e., HIGH, STANDARD, and DEFERRED, have been measured by simulation experiments for various packet lengths and buffer sizes. This way optimum packet length and buffer sizes have been deduced. The optimum buffer size at a node corresponds to the best overall performance for messages of all priorities in terms of overflow rates at the buffers of the nodes with respect to increasing offered loads. The optimum packet length has been found to be between 276 and 400 USTs (unit symbol times), i.e., 184 and 286 b. If 276 USTs is assigned as the optimum packet length, the optimum buffer size at each node is found to be between 150 and 200 packets, i.e., approximately 28 to 37 kb. >

Delay performances of standard and modified CEBUS schemes

Abstract: The performance of the CEBUS, a local area network proposed by the Electronics Industries Association for a smart house is analyzed under varying network loads and traffic patterns. The performances of reduced complexity versions of the CEBUS scheme are compared with that of the standard CEBUS. A message's delay in a CEBUS network, at a given network bandwidth, is dependent not only on its priority but also but also on the traffic priority pattern in the network. The deleterious effects of assigning too much traffic to the highest priority are quantified by simulation analysis. It was also observed that the performance of a reduced complexity scheme was comparable to that of the standard CEBUS protocol. >

Subjective assessment of cable impairments on television picture quality

Abstract: The subjective assessment of NTSC television pictures that have been subjected to a number of levels of commonly encountered cable-system impairments is discussed. The impairments included random noise, phase noise, microreflections, composite triple beat, and chroma/luma or group delay. The evaluations were performed in controlled-viewing experiments using psychological test methods with both expert and nonexpert viewers. The tests evaluated picture impairments, using the CCIR impairment scale with terms describing a continuum of annoyance. A comparison of the random noise test results with data from earlier similar studies in 1958 and 1983 demonstrates a continuing rise in view expectations for improved picture quality. >

A multistandard teletext processor

Abstract: A multistandard single-chip teletext processor for application in analog and digital TV sets is described. Based on a 65C02 core with RAM and ROM on chip, an adaptive data slicer, a display controller and a number of interfaces, the new circuit allows acquisition and display of various teletext standards such as WST, CAPTION and VPS. The basic idea behind the multistandard teletext processor concept is the replacement of random logic by software. Except for a DRAM as page memory no additional chips are needed to generate an analog RGB text display decoded from an analog composite video input. >

Investigation of the performance of a controlled router for the CEBus (home automation)

Abstract: A study of the delay and throughput of the consumer electronics bus (CEBus) with two media, power line (PL) and twisted pair (TP), interconnected through a controlled router with three priorities (HIGH, STANDARD, and DEFERRED) is discussed The controlled router aims to provide fair channel access opportunities for intranetwork traffic for messages of all priorities It reduces excessive channel access by internetwork traffic through the router and maintains the delay of intranetwork traffic at reasonable levels The results of the simulation experiments are presented The message delay of HIGH for internetwork traffic on the PL is of a larger value than that of HIGH and STANDARD for intranetwork traffic at light load and is smaller than that of the STANDARD and DEFERRED at heavy load Moreover, the intranetwork message throughputs and delays of STANDARD and DEFERRED have improved greatly, in comparison to a traditional uncontrolled router, at only a small cost in internetwork HIGH performance >

A new scheme for finite element analysis of an interface phenomena of VCR drum, head and tape

Abstract: A numerical scheme for the finite element method (FEM) used for calculating the mechanical interface phenomena in a video cassette recorder (VCR), namely, between the tape, the head and the drum, is presented. To permit estimation of the characteristics of the VCR system and the effects of design parameters on the performance, it was necessary to reduce CPU time and memory storage without losing accuracy. The analysis area was divided into two subareas, a whole drum area and a head circumference area. The analysis for the latter area was carried out based on the results for the former area. The analysis results were in good agreement with experimental data and required a short computation time. >

Infrared remote control for electronic display system

Abstract: A microcontroller-based display system with infrared remote control is described. The input technique uses an infrared remote transmitter for easy programming and editing. The author also describes the key-in software design which can greatly reduce the number of keys on the keyboard. >

A new motion-adaptive video processing system for TV receivers and VCRs

Abstract: A cost-effective motion-adaptive video processing system was developed for luma/chroma separation and frame recursive noise reduction, using only a 2-Mbit frame memory. The problem of aliasing due to subsampling and the problem of waveform deterioration due to band restriction were solved, and a method of chroma motion detection using interframe difference signals was developed. Therefore, the required frame memory capacity can be reduced without a performance compromise. The video processing part of this system was produced as a single-chip digital LSI and was installed in a home-use S-VHS format VCR. The result was improved picture quality for VCR recording and playback. >

Development of a solid state sound recorder system

Abstract: A solid state sound recorder system LSI was developed for use in sound recorder equipment. The LSI used a novel audio compression algorithm and enhanced large capacity memory management to eliminate the need for magnetic tape recording. The LSI used external memory devices to store audio data. Up to 32 Mbit of DRAM (dynamic RAM) can be used, and DRAM, SRAM (static RAM), and ROM can be used individually or in a mixed format for flexibility in system design. The LSI memory control circuitry can automatically detect and bypass a faulty location in memory. The memory management circuits also ensure that there is no delay in recording and replay. >

Multinumeric decoder for dot matrix displays

Abstract: A simple and self-controlled multinumeric decoder-driver for dot matrix displays is proposed. A multinumeric display system using this decoder displays the decimal digit of the BCD (binary coded decimal) input in any one form of eight different languages. The circuitry of the decoder is simple but its capability is versatile. With a little additional hardware, the display system could easily be expanded to provide the display of digits in many more languages. Also, a single multinumeric decoder accepting four BCD inputs and driving four dot matrix display devices is reported. >

Real-time 2-D homomorphic filter for broadcast TV signals

Abstract: Hardware design and implementation of a 2-D sample- and-hold semisystolic filter structure are presented. Log and antilog circuits are utilized with a high-frequency emphasis IIR (infinite impulse response) filter to provide homomorphic filtering. Hardware design is discussed with reference to specific device types and characteristics. A prototype circuit using MSI and MSI circuits on a custom-made PCB (printed circuit board) is shown along with applications to real-time filtering of broadcast TV images. >

A single chip solution for closed caption decoding

Abstract: A single CMOS chip for closed caption decoding is described. The performance of this chip in the area of data acquisition was high because of intensive use of digital signal processing techniques. This also reduces the amount of external components. The chip can be operated in a stand-alone mode or under control of a microcomputer found in TV sets. The chip has enough space in the form of ROM capacity and built-in microcontroller for future extensions to the standard. >