Showing papers in "Microelectronics Journal in 1992"

TL;DR: In this paper, the authors describe the logic cell structure, interconnect architecture, performance characteristics and CAE tools developed for the QL8 × 12, the first member of a family of high-speed FPGAs.

TL;DR: The speed of evolution of thick-film technology as an advanced technique for solid state sensors is illustrated and current research activities and programmes, which promise new interesting materials for, and emerging applications of, thick- film sensors are described.

TL;DR: It is shown that the formulation of the general CVM by means of hypergraphs turns out to be surprisingly simple and general.

TL;DR: BERT (Berkeley reliability simulator) as mentioned in this paper is a CAD tool developed for the purpose of design for reliability. But its intended application, the physical models and approaches used to simulate the hot electron effect, oxide time-dependent breakdown, electromigration, and bipolar transistor gain degradation.

TL;DR: A detailed study of the characteristics of CMOS receiver noise immunity and the effects of skewing CMOS output drivers on simultaneous switching noise was performed closed-form equations are given to calculate the simultaneous switching noises and the number of V DD /V SS bond pads-packagem pins in multichip modules as mentioned in this paper.

TL;DR: Folded source-coupled (FSCL) and current-steering logic (CSL) techniques have been developed to complement static logic for application in high-precision, high-speed, mixed analog/digital CMOS integrated circuits as discussed by the authors.

TL;DR: In the field of wide bandgap semiconductors, recent developments in the mainstream world of silicon may have gone unremarked as discussed by the authors, however, the large number of defects and difficulties in preparing n-and p-type material have hampered their broader application.

TL;DR: An effective buffer insertion algorithm for high speed clock layout to minimize the clock delay and skew, based on a new interconnection delay model, in which several practical factors such as crossunders and vias are considered in the delay calculation.

TL;DR: A general purpose and user-friendly behavioural simulator, which is developed and represents a good trade-off between accuracy, flexibility, ease of use and computation time is provided.

TL;DR: In this article, a new placement method using the Tabu Search technique, which attempts to overcome the limitations and problems of moving from a local optimal point, is adapted to improve the placement quality.

TL;DR: In this paper, a heater structure for gas sensors is realized by utilizing standard CMOS technology together with post-process etching, and the heater, fully suspended over an ≈100 μm deep cavity, is capable of supplying temperatures necessary for the operation of most semiconductor gas sensors.

TL;DR: In this article, a digital-to-analogue converter circuit is presented which employs a quasi-passive, parasitic-compensated, switched capacitor circuit to implement a conversion algorithm consisting of a charge division between equal-valued capacitors.

TL;DR: The one-to-one space-time mapping approach has been extended to mapping multiple problem instances onto a single systolic array and significantly reduces the number of I/O pins on the chip as well as increases the throughput and the ratio of throughput over space.

TL;DR: In this article, a 3.3 V-only CMOS I/O buffer is proposed that interfaces with 5 V and TTL devices and reduces the power supply bus on the application specific integrated circuit (ASIC) chip.

TL;DR: In this paper, the interface states density has been found to be in the range of 1011 cm−2 eV−1 with a peak in the band gap of Si at about 0·51 eV below the conduction band edge.

TL;DR: In this article, the effect of post-oxidation annealing in N 2 and O 2 on defect-related low-field and intrinsic breakdown behavior was studied, and the occurrence of low field pre-breakdown can be reduced by a short O 2 anneal, in agreement with the earlier results.

TL;DR: The semiconductor industry is crucial for all In fo rma t ion Technology (IT) industries and no Government or business can ignore this fact anymore though there is a wide disparity of views as to how this is best exploited.

TL;DR: In this article, the recent advances in technology of photodetectors are discussed with special emphasis on intrinsic photodeter detectors operated at near room temperature, with the aim of making IR detectors cheaper and more convenient to use.

TL;DR: In this paper, a general circuit configuration for the relisation of voltage-mode biquad filters with a high input impedance, which enables the circuits to be cascaded without requiring any impedance matching device, is presented.

TL;DR: In this article, an irreversible resistance transition has been investigated in a LPCVD polycrystalline silicon thin-film resistor, where the resistor can be switched to a short state having resistance reduction by a factor of 100.

TL;DR: The PWM circuit is used to produce a high-resolution, direct-counting A/D converter that requires only one counter and operates up to 175°C.

TL;DR: In this article, a micromechanical pressure sensor based on an interferometric silicon optical ARROW waveguide is examined, and the deflection and extension of a suspended waveguide beam due to a uniformly applied pressure is analyzed.

TL;DR: In this article, a transducer chip consisting of a 2 × 2 array of silicon black-body emitters (thermal pixels) integrated with on-chip control circuitry is presented.

TL;DR: In this paper, a non-invasive technique for measuring both the electrical and topographical characteristics of high frequency circuits has been developed, based on the scanning force microscope instrument, where the instrument probe mechanism is modified to measure the charge distribution at a localized site on the circuit under test.

TL;DR: This paper proposes a BIST multiple-signature compaction scheme that achieves negligibly small aliasing against reasonable extra hardware expenses compared with known standard single signature schemes and against less expenses than those incurred by other “low aliasing probability” schemes.

TL;DR: In this article, two characteristics of the photoresist development process, the solubility curves and the average development rate at different exposure doses, are used to analyse the response of electron-beam exposed resists.

TL;DR: In this paper, the MOS source-coupled pair is linearized by introducing a dynamic bias current, which can achieve harmonic distortion of as low as 70 ppm for V in p−p up to 6 V at ± 5 V supply.

TL;DR: In this article, a post-fabrication defect avoidance process using a laser to make low resistance connections and cut lines in 3 and 1·2μm technologies is described.

TL;DR: In this paper, a simple approach to obtain a step up/down grounded resistor without the need of a counter and a D/A converter is proposed, which is capable of handling large signals with low distortion.