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Journal ArticleDOI

A BPSK/QPSK Timing-Error Detector for Sampled Receivers

F. Gardner
- 01 May 1986 - 
- Vol. 34, Iss: 5, pp 423-429
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TLDR
A simple algorithm for detection of timing error of a synchronous, band-limited, BPSK or QPSK data stream is proposed and derivation of the s curve reveals a sinusoidal shape.
Abstract
A simple algorithm for detection of timing error of a synchronous, band-limited, BPSK or QPSK data stream is proposed. The algorithm requires only two samples per symbol for its operation. One of the two samples is also used for the symbol decision. Derivation of the s curve reveals a sinusoidal shape.

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Citations
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Hybrid clock and data recovery for a high speed transceiver implemented on a FPGA

TL;DR: Generating the exact sampling clock that drives the ADC at the receiver is a simple way to measure the precision of the ADC signal.
Proceedings ArticleDOI

Timing recovery scheme for multi-antenna receiver in presence of Doppler shift

TL;DR: The proposed timing recovery tracking scheme for single-input multiple-output (SIMO) communications derived from the maximum likelihood criterion for an all-digital single carrier receiver is able to take advantage of the spatial diversity at the receiver side, especially when a common time scaling is present over the multiple antennas.
Proceedings ArticleDOI

Mitigating bandwidth-limitation impairments based on transmitter-side DSP

TL;DR: This work demonstrates the single polarization 25 Gb/s and 50 G b/s QPSK signals using an arbitrary waveform generator (AWG) with the 3-dB analog bandwidth of 11.1 GHz and applies transmitter-side DSP algorithms to mitigate bandwidth-limitation impairments.
Patent

Procédé de compensation des différences en temps de propagation de groupe entre les filtres analogiques d'un émetteur ou d'un récepteur de signaux en quadrature de phase

TL;DR: In this article, a procede for compensation des differences in the propagation of signaux in a group is presented, which is based on the notion of ponderation appliques. But it is not defined in detail.
Dissertation

FPGA Implementation of the Front-End of a DOCSIS 3.0 Receiver

Rory J Gowen
TL;DR: Methods for, and an example of, the design and implementation of a DOCSIS compliant QAM receiver front-end that corrects for timing, phase and frequency impairments experienced in the upstream communication channel when additive noise is present are presented.
References
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Journal ArticleDOI

Timing Recovery in Digital Synchronous Data Receivers

TL;DR: A new class of fast-converging timing recovery methods for synchronous digital data receivers is investigated, and a general method is outlined to obtain near-minimum-variance estimates of the timing offset with respect to a given steady-state sampling criterion.
Book

Telecommunication systems engineering

TL;DR: This classic graduate- and research-level texty by two leading experts in the field of telecommunications is essential reading for anyone workign today in space and satellite digital communicatiions and those seeking a wider background in statistical communication theory and its applications.
Journal ArticleDOI

Carrier and Bit Synchronization in Data Communication--A Tutorial Review

TL;DR: This paper examines the problems of carrier phase estimation and symbol timing estimation for carrier-type synchronous digital data signals, with tutorial objectives foremost.
Journal ArticleDOI

Statistical Properties of Timing Jitter in a PAM Timing Recovery Scheme

TL;DR: A new technique is presented for evaluating the performance of a popular type of timing recovery circuit for baseband synchronous pulse amplitude modulation (PAM) data signals and expressions for rms phase fluctuation in the timing wave are presented.
Journal ArticleDOI

Timing Recovery in Digital Subscriber Loops

TL;DR: Emphasis is on those techniques that lend themselves to implementation in MOSLSI technology, where the objective requirement is that timing recovery be implemented on a sampled-data signal (with the minimum possible sampling rate where EC is used).