Journal ArticleDOI
A BPSK/QPSK Timing-Error Detector for Sampled Receivers
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TLDR
A simple algorithm for detection of timing error of a synchronous, band-limited, BPSK or QPSK data stream is proposed and derivation of the s curve reveals a sinusoidal shape.Abstract:
A simple algorithm for detection of timing error of a synchronous, band-limited, BPSK or QPSK data stream is proposed. The algorithm requires only two samples per symbol for its operation. One of the two samples is also used for the symbol decision. Derivation of the s curve reveals a sinusoidal shape.read more
Citations
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Journal ArticleDOI
A decision-directed symbol timing recovery circuit for ATSC digital TV receivers
TL;DR: With the proposed method, the proposed scheme works independently of the segment synchronization by extracting timing information from the randomized data symbols even in the extremely small roll-off case, resulting in robust timing recovery with reduced timing jitter compared to the conventional correlation method.
Timing recovery techniques for digital recording systems
TL;DR: This thesis develops a new asynchronous equalizer adaptation structure with fully digital interpolative timing recovery (ITR) for digital optical recording systems.
Journal ArticleDOI
Open-Loop Analysis of a Nonlinearly Modified Gardner Synchronizer
TL;DR: It is shown that a simple squaring unit ahead of the Gardner detector makes the tracking loop work under highly bandwidth-efficient conditions, and it is demonstrated that the modified Gardner synchronizer is a serious candidate for systems, where bandwidth efficiency is a major figure of merit.
Journal ArticleDOI
Recurrent Neural Network Soft-Demapping for Nonlinear ISI in 800Gbit/s DWDM Coherent Optical Transmissions
Maximilian Schadler,Georg Böcherer,Fabio Pittala,Stefano Calabro,Nebojsa Stojanovic,Christian Bluemm,Maxim Kuschnerov,Stephan Pachnicke +7 more
TL;DR: In this paper, a bidirectional recurrent neural network soft-demapper (BRNN-SD) was proposed and compared with a time delay neural network (TDNN) and a reference digital signal processing (DSP) scheme.
Proceedings ArticleDOI
An efficient and optimized FPGA Feedback M-PSK Symbol Timing Recovery Architecture based on the Gardner Timing Error Detector
TL;DR: An efficient and optimized FPGA implementation of a complete digital Symbol Timing Recovery (STR) architecture based on a digital PLL loop structure that offers the best performances compared with the other implemented works present in literature is presented.
References
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Journal ArticleDOI
Timing Recovery in Digital Synchronous Data Receivers
K. Mueller,M. Muller +1 more
TL;DR: A new class of fast-converging timing recovery methods for synchronous digital data receivers is investigated, and a general method is outlined to obtain near-minimum-variance estimates of the timing offset with respect to a given steady-state sampling criterion.
Book
Telecommunication systems engineering
TL;DR: This classic graduate- and research-level texty by two leading experts in the field of telecommunications is essential reading for anyone workign today in space and satellite digital communicatiions and those seeking a wider background in statistical communication theory and its applications.
Journal ArticleDOI
Carrier and Bit Synchronization in Data Communication--A Tutorial Review
TL;DR: This paper examines the problems of carrier phase estimation and symbol timing estimation for carrier-type synchronous digital data signals, with tutorial objectives foremost.
Journal ArticleDOI
Statistical Properties of Timing Jitter in a PAM Timing Recovery Scheme
L. Franks,J. Bubrouski +1 more
TL;DR: A new technique is presented for evaluating the performance of a popular type of timing recovery circuit for baseband synchronous pulse amplitude modulation (PAM) data signals and expressions for rms phase fluctuation in the timing wave are presented.
Journal ArticleDOI
Timing Recovery in Digital Subscriber Loops
TL;DR: Emphasis is on those techniques that lend themselves to implementation in MOSLSI technology, where the objective requirement is that timing recovery be implemented on a sampled-data signal (with the minimum possible sampling rate where EC is used).
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