Journal ArticleDOI
A BPSK/QPSK Timing-Error Detector for Sampled Receivers
TLDR
A simple algorithm for detection of timing error of a synchronous, band-limited, BPSK or QPSK data stream is proposed and derivation of the s curve reveals a sinusoidal shape.Abstract:
A simple algorithm for detection of timing error of a synchronous, band-limited, BPSK or QPSK data stream is proposed. The algorithm requires only two samples per symbol for its operation. One of the two samples is also used for the symbol decision. Derivation of the s curve reveals a sinusoidal shape.read more
Citations
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DissertationDOI
Low Complexity Digital Signal Processing for Optical Communications – Chromatic Dispersion, Polarization and Timing Synchronization
TL;DR: The aim of this work is to contribute towards the humanizing of sport in Germany by promoting sporting participation and encouraging people to participate in the sport.
Proceedings ArticleDOI
Jamming mitigation by randomized bandwidth hopping
TL;DR: By combining bandwidth hopping at the transmitter with adaptive filtering at the receiver, BHSS is able to improve the jamming resistance of the communication beyond the processing gain of conventional spread spectrum techniques such as DSSS and FHSS without an increase in RF spectrum requirements.
Patent
Optical communication device
TL;DR: In this paper, a phase detector is used to generate a phase signal indicating a displacement of a sampling of a reception signal, and a clock switch-determiner is configured to switch from an reference clock to a clock of transferred data when a value of an amplitude of the phase signal exceeds a given threshold value.
Proceedings ArticleDOI
Novel Techniques to minimize the Error Propagation of Decision Feedback Equalizer in 8VSB DTV System
TL;DR: Novel and yet simple techniques are presented to minimize the error propagation caused by the large precursors and postcursors of the decision feedback equalizer (DFE) in 8VSB DTV system.
Real-Time Wideband Telemetry Receiver Architecture and Performance
TL;DR: The architecture and algorithm development for a field programmable gate array (FPGA) wideband telemetry receiver prototype capable of processing data rates in excess of 100 megabits per second is described.
References
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Journal ArticleDOI
Timing Recovery in Digital Synchronous Data Receivers
K. Mueller,M. Muller +1 more
TL;DR: A new class of fast-converging timing recovery methods for synchronous digital data receivers is investigated, and a general method is outlined to obtain near-minimum-variance estimates of the timing offset with respect to a given steady-state sampling criterion.
Book
Telecommunication systems engineering
TL;DR: This classic graduate- and research-level texty by two leading experts in the field of telecommunications is essential reading for anyone workign today in space and satellite digital communicatiions and those seeking a wider background in statistical communication theory and its applications.
Journal ArticleDOI
Carrier and Bit Synchronization in Data Communication--A Tutorial Review
TL;DR: This paper examines the problems of carrier phase estimation and symbol timing estimation for carrier-type synchronous digital data signals, with tutorial objectives foremost.
Journal ArticleDOI
Statistical Properties of Timing Jitter in a PAM Timing Recovery Scheme
L. Franks,J. Bubrouski +1 more
TL;DR: A new technique is presented for evaluating the performance of a popular type of timing recovery circuit for baseband synchronous pulse amplitude modulation (PAM) data signals and expressions for rms phase fluctuation in the timing wave are presented.
Journal ArticleDOI
Timing Recovery in Digital Subscriber Loops
TL;DR: Emphasis is on those techniques that lend themselves to implementation in MOSLSI technology, where the objective requirement is that timing recovery be implemented on a sampled-data signal (with the minimum possible sampling rate where EC is used).
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