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A Bridge-based Compression Algorithm for Topological Quantum Circuits

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TLDR
Wang et al. as mentioned in this paper presented the first work that can automatically perform bridge compression on topological quantum error correction (TQEC) circuits, which can averagely reduce space-time volumes by 83%.
Abstract
The topological quantum error correction (TQEC) scheme is promising for scalable and reliable quantum computing. A TQEC circuit can be modeled by a three-dimensional diagram, and the implementation resource of a TQEC circuit is abstracted to its space-time volume. Implementing a quantum algorithm with a reasonable physical qubit number and reasonable computation time is challenging for large-scale practical problems. Therefore, minimizing the space-time volume of a TQEC circuit becomes a crucial issue. Previous work shows that bridge compression can greatly compress TQEC circuits, but it was performed only manually. It is desirable to develop automated compression techniques for TQEC circuits to achieve low-overhead, large-scale quantum computations. In this paper, we present the first work that can automatically perform bridge compression on TQEC circuits. Compared with the state-of-the-art method, experimental results show that our proposed algorithm can averagely reduce space-time volumes by 83%.

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Citations
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Journal ArticleDOI

A Bridge-Based Compression Algorithm for Topological Quantum Circuits

TL;DR: Wang et al. as mentioned in this paper proposed a bridge compression technique to compact TQEC circuits with modularization, and they also proposed a time-ordering-aware 2.5D placement for compacting TQec circuits and satisfying time-ordered measurement constraints.
Proceedings ArticleDOI

A bridge-based algorithm for simultaneous primal and dual defects compression on topologically quantum-error-corrected circuits

TL;DR: Wang et al. as discussed by the authors proposed an automated bridging compression algorithm for large-scale topological quantum error correction (TQEC) circuits, which performs initialization/measurement simplification and flipping to improve the compression.
References
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Peter W. Shor
- 01 Jun 1999 - 
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Proceedings ArticleDOI

PathFinder: A Negotiation-Based Performance-Driven Router for FPGAs

TL;DR: PathFinder as mentioned in this paper uses an iterative algorithm that converges to a solution in which all signals are routed while achieving close to the optimal performance allowed by the placement, which is achieved by forcing signals to negotiate for a resource and thereby determine which signal needs the resource most.
Proceedings ArticleDOI

B*-Trees: a new representation for non-slicing floorplans

TL;DR: An efficient, flexible, and effective data structure, B-trees for non-slicing floorplans, based on ordered binary trees and the admissible placement presented in [1], and a B-tree based simulated annealing scheme for floorplan design.
Journal ArticleDOI

Topological fault-tolerance in cluster state quantum computation

TL;DR: In this article, a fault-tolerant version of the one-way quantum computer using a cluster state in three spatial dimensions is described, where topologically protected quantum gates are realized by choosing appropriate boundary conditions on the cluster.
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