Proceedings ArticleDOI
A Generalized Channel Router
David W. Hightower,Robert L. Boyd +1 more
- pp 12-21
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TLDR
A demonstration of the versatility of the router (it is used to solve the Hampton Court Maze) and with applications of the Router in TI's I2L (Integrated Injector Logic) / STL (Schottky Transistor Logic) Automatic Layout System.Abstract:
A "generalized" channel router operates on horizontal and vertical channels generated from an irregular cell structure, and is free of a routing grid. Such a router can solve virtually any routing problem. It has two major phases: the global routing phase and the channel routing phase. This paper describes both phases as they have been implemented at TI. It concludes with a demonstration of the versatility of the router (it is used to solve the Hampton Court Maze) and with applications of the router in TI's I2L (Integrated Injector Logic) / STL (Schottky Transistor Logic) Automatic Layout System.read more
Citations
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Book
Algorithms for VLSI Physical Design Automation
TL;DR: This book is a core reference for graduate students and CAD professionals and presents a balance of theory and practice in a intuitive manner.
Journal ArticleDOI
Glitter: A Gridless Variable-Width Channel Router
H.H. Chen,Ernest S. Kuh +1 more
TL;DR: The objective is to minimize the routing area, while keeping the constraints of wire widths and spacing satisfied, in a gridless router capable of handling channels with irregular boundaries, and cyclic constraints.
Glitter: A Gridless V ariable- Width Channel Router
Howard H. Chen,Ernest S. Kuh +1 more
TL;DR: In this article, a gridless approach based on design rules is proposed to minimize the routing area, while keeping the constraints of wire widths and spacing satisfied, which is also capable of handling channels with irregular boundaries, and cyclic constraints.
Proceedings ArticleDOI
Automated Rip-Up and Reroute Techniques
TL;DR: This paper concentrates on one automated technique, rip-up and reroute, which can be improved through a variety of manual and automated techniques.
Proceedings ArticleDOI
An Over-Cell Gate Array Channel Router
TL;DR: A gate array router that utilizes horizontal and vertical over-cell routing channels to increase cell density and Logic macros, with fixed intraconnect metal that may span several cell columns, are mapped onto the array producing partially filled routing channels.
References
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Book ChapterDOI
Reducibility Among Combinatorial Problems
TL;DR: The work of Dantzig, Fulkerson, Hoffman, Edmonds, Lawler and other pioneers on network flows, matching and matroids acquainted me with the elegant and efficient algorithms that were sometimes possible.
Reducibility Among Combinatorial Problems.
TL;DR: Throughout the 1960s I worked on combinatorial optimization problems including logic circuit design with Paul Roth and assembly line balancing and the traveling salesman problem with Mike Held, which made me aware of the importance of distinction between polynomial-time and superpolynomial-time solvability.
Journal ArticleDOI
An Algorithm for Path Connections and Its Applications
TL;DR: The algorithm described in this paper is the outcome of an endeavor to answer the following question: Is it possible to find procedures which would enable a computer to solve efficiently path-connection problems inherent in logical drawing, wiring diagramming, and optimal route finding?
Proceedings ArticleDOI
Wire routing by optimizing channel assignment within large apertures
TL;DR: The purpose of this paper is to introduce a new wire routing method for two layer printed circuit boards based on the newly developed channel assignment algorithm and requires many via holes.
Proceedings ArticleDOI
A “DOGLEG” channel router
TL;DR: The routing algorithm presented here was developed as part of LTX, a computer-aided design system for integrated circuit layout and was implemented on an HP-2100 minicomputer.