A novel decoupling capacitance platform for substrates, sockets, and interposers

TLDR: This technology is comprised of a novel integration of decoupling capacitance between the core power nets and ground, which lowered power supply noise and increased core power stability, permitting greater semiconductor switching frequency while reducing overall system cost.

Abstract: Due to increasing demands on the power delivery networks within current and next-generation computer systems, power integrity has become a leading focus, in addition to signal integrity, in system design. We will present a technology deployed within substrates, interposers, or sockets to enhance core power delivery. Our technology is comprised of a novel integration of decoupling capacitance between the core power nets and ground. This decoupling replaces the numerous decoupling capacitors suboptimally placed on traditional printed circuit boards (PCBs). The net result it lowered power supply noise and increased core power stability, permitting greater semiconductor switching frequency while reducing overall system cost. Studying actual system applications, we compare this technology to a wide range of expensive and largely ineffective decoupling strategies that have been proposed and even deployed, and demonstrate its superiority in both cost and performance.