Journal ArticleDOI
A Suggestion for a Fast Multiplier
TLDR
The author develops an adder tree to sum this set when t= 1 the maximum number of regions intersections of n t-flats and shows that a tree will be dependent on both t and n.Abstract:
will be less than Cnt+1(t+1)! but may be space into which the latter may be divided multiplier into twenty 2-bit segments. He (and usually will be) more than (t+2)!. by a maximum possible number of mutual then develops an adder tree to sum this set When t= 1 the maximum number of regions intersections of n t-flats. In general, q will be of twenty entries. He then shows that a tree will be dependent on both t and n. It is first shown of nineteen adders (I believe twenty areread more
Citations
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Journal ArticleDOI
Graph-Based Algorithms for Boolean Function Manipulation
TL;DR: In this paper, the authors present a data structure for representing Boolean functions and an associated set of manipulation algorithms, which have time complexity proportional to the sizes of the graphs being operated on, and hence are quite efficient as long as the graphs do not grow too large.
Journal ArticleDOI
Very high-speed computing systems
TL;DR: In this paper, the authors classified very high-speed computers as follows: 1) Single Instruction Stream-Single Data Stream (SISD) 2) SIMD 3) MIMD 4) MISD-MIMD.
Journal ArticleDOI
High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree
TL;DR: Since the multiplier has a regular cellular array structure similar to an array multiplier, it is suitable for VLSI implementation and is excellent in both computation speed and regularity in layout.
Journal ArticleDOI
The Area-Time Complexity of Binary Multiplication
TL;DR: By using a model of computation which is a realistic approx~mauon to current and anucipated LSI or VLSI technology, it is shown that A T 2.0 is shown to be the time required to perform multtphcaUon of n-bit binary numbers on a chip.
Proceedings ArticleDOI
Simplifying quotient determination in high-radix modular multiplication
TL;DR: Algorithms that are obtained through rewriting of Montgomery's algorithm are presented, where the determination of quotients becomes trivial and the cycle time becomes independent of the choice of radix.
References
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Journal ArticleDOI
A Suggestion for a Fast Multiplier
TL;DR: A design is developed for a multiplier which generates the product of two numbers using purely combinational logic, i.e., in one gating step, using straightforward diode-transistor logic.