Journal ArticleDOI
Bit-serial systolic divider and multiplier for finite fields GF(2/sup m/)
M.A. Hasan,Vijay K. Bhargava +1 more
TLDR
A systolic structure for bit-serial division over the field GF(2/sup m/) is developed to avoid global data communications and dependency of the time step duration on m, important for applications where the value of m is large.Abstract:
A systolic structure for bit-serial division over the field GF(2/sup m/) is developed. Consideration is given to avoid global data communications and dependency of the time step duration on m. This is important for applications where the value of m is large. The divider requires only three basic processors and one simple control signal and its circuit and time complexities are proportional to m/sup 2/ and m, respectively. It does not depend on the irreducible polynomial and can be expanded easily. Moreover, with m additional simple processors, a bit-serial systolic multiplier is developed which uses part of the divider structure. This is advantageous from the implementation point of view, as both the divider and multiplier can be fabricated on a single chip, resulting in a reduction of area. >read more
Citations
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Book ChapterDOI
Introduction to finite fields and their applications: Preface
Rudolf Lidl,Harald Niederreiter +1 more
Journal ArticleDOI
Low-Energy Digit-Serial/Parallel Finite Field Multipliers
Leilei Song,Keshab K. Parhi +1 more
TL;DR: A new approach for designing digit-serial/parallel finite field multipliers is presented, where the digit-level array-type algorithm minimizes the latency for one multiplication operation and the parallel architecture inside of each digit cell reduces both the cycle-time as well as the switching activities, hence power consumption.
Journal ArticleDOI
GF(2/sup m/) multiplication and division over the dual basis
TL;DR: An algorithm for GF(2/sup m/) multiplication/division is presented and a new, more generalized definition of duality is proposed and the bit-serial Berlekamp multiplier is derived and shown to be a specific case of a more general class of multipliers.
Journal ArticleDOI
Hardware architectures for public key cryptography
TL;DR: This paper presents an overview of hardware implementations for the two commonly used types of public key cryptography, i.e. RSA and elliptic curve cryptography, both based on modular arithmetic.
Journal ArticleDOI
Systolic array implementation of Euclid's algorithm for inversion and division in GF(2/sup m/)
Jyh-Huei Guo,Chin-Liang Wang +1 more
TL;DR: This paper presents two new systolic arrays to realize Euclid's algorithm for computing inverses and divisions in finite fields GF(2/sup m/) with the standard basis representation using parallel-in parallel-out and serial-in serial-out schemes.
References
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Why systolic architectures
TL;DR: The basic principle of systolic architectures is reviewed and it is explained why they should result in cost-effective, highperformance special-purpose systems for a wide range of problems.
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Introduction to finite fields and their applications
Rudolf Lidl,Harald Niederreiter +1 more
TL;DR: An introduction to the theory of finite fields, with emphasis on those aspects that are relevant for applications, especially information theory, algebraic coding theory and cryptology and a chapter on applications within mathematics, such as finite geometries.
Book ChapterDOI
Introduction to finite fields and their applications: Preface
Rudolf Lidl,Harald Niederreiter +1 more
Journal ArticleDOI
VLSI Architectures for Computing Multiplications and Inverses in GF(2 m )
TL;DR: In this article, a pipeline structure is developed to realize the Massey-Omura multiplier in the finite field GF(2m) with the simple squaring property of the normal basis representation used together with this multiplier.