Journal ArticleDOI
Systolic Multipliers for Finite Fields GF(2 m )
TLDR
Two systolic architectures are developed for performing the product–sum computation AB + C in the finite field GF( 2m) of 2melements, where A, B, and C are arbitrary elements of GF(2m).Abstract:
Two systolic architectures are developed for performing the product–sum computation AB + C in the finite field GF(2m) of 2melements, where A, B, and C are arbitrary elements of GF(2m). The first multiplier is a serial-in, serial-out one-dimensional systolic array, while the second multiplier is a parallel-in, parallel-out two-dimensional systolic array. The first multiplier requires a smaller number of basic cells than the second multiplier. The second multiplier heeds less average time per computation than the first multiplier if a number of computations are performed consecutively. To perform single computations both multipliers require the same computational time. In both cases the architectures are simple and regular and possess the properties of concurrency and modularity. As a consequence they are well suited for use in VLSI systems.read more
Citations
More filters
Journal ArticleDOI
VLSI Architectures for Computing Multiplications and Inverses in GF(2 m )
TL;DR: In this article, a pipeline structure is developed to realize the Massey-Omura multiplier in the finite field GF(2m) with the simple squaring property of the normal basis representation used together with this multiplier.
Journal ArticleDOI
Optimal normal bases in GF( p n )
TL;DR: This work has applications in crytography and coding theory since a reduction in the complexity of multiplying and exponentiating elements of GF(2n) is achieved for many values of n, some prime.
Journal ArticleDOI
Low-Energy Digit-Serial/Parallel Finite Field Multipliers
Leilei Song,Keshab K. Parhi +1 more
TL;DR: A new approach for designing digit-serial/parallel finite field multipliers is presented, where the digit-level array-type algorithm minimizes the latency for one multiplication operation and the parallel architecture inside of each digit cell reduces both the cycle-time as well as the switching activities, hence power consumption.
Journal ArticleDOI
Systolic array implementation of multipliers for finite fields GF(2/sup m/)
Chin-Liang Wang,Jung-Lung Lin +1 more
TL;DR: Two architectures for fast multiplication in finite fields GF(2/sup m/) with the standard basis representation possess features of regularity, modularity, concurrency, and unidirectional data flow and are well suited to VLSI implementation with fault-tolerant design.
Book ChapterDOI
VLSI Designs for Multiplication over Finite Fields GF (2m)
TL;DR: A method for designing a parallel multiplier for GF(2m) that is both speed and area efficient and well suited for VLSI is described.
References
More filters
Book
The Theory of Error-Correcting Codes
TL;DR: This book presents an introduction to BCH Codes and Finite Fields, and methods for Combining Codes, and discusses self-dual Codes and Invariant Theory, as well as nonlinear Codes, Hadamard Matrices, Designs and the Golay Code.
Book
Information Theory and Reliable Communication
TL;DR: This chapter discusses Coding for Discrete Sources, Techniques for Coding and Decoding, and Source Coding with a Fidelity Criterion.
Book
Algebraic Coding Theory
TL;DR: This is the revised edition of Berlekamp's famous book, "Algebraic Coding Theory," originally published in 1968, wherein he introduced several algorithms which have subsequently dominated engineering practice in this field.
Journal ArticleDOI
Why systolic architectures
TL;DR: The basic principle of systolic architectures is reviewed and it is explained why they should result in cost-effective, highperformance special-purpose systems for a wide range of problems.