Communication based logic partitioning
Mark Beardslee,Bill Lin,Alberto Sangiovanni-Vincentelli +2 more
- pp 32-37
TLDR
The problem of partitioning, or decomposing a combinational logic specification is addressed, which operates on the logic specification before the synthesis and mapping steps have been performed, to minimize the number of pins needed to implement the resulting partitions.Abstract:Â
The problem of partitioning, or decomposing a combinational logic specification is addressed. This method operates on the logic specification before the synthesis and mapping steps have been performed. This allows good circuit decomposition and the logic as needed. The main goal of the algorithm is to minimize the number of pins needed to implement the resulting partitions. This is accomplished by adding logic to reduce the number of pins, and by minimizing the number of pins required for inter-partition communication by encoding the signals that flow between partitions. Algorithms are implemented by the use of binary decision diagrams. >read more
Citations
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Journal ArticleDOI
EVBDD-based algorithms for integer linear programming, spectral transformation, and function decomposition
TL;DR: This paper presents EVBDD-based algorithms for solving integer linear programs, computing spectral coefficients of Boolean functions, and performing function decomposition under the SIS environment.
Book ChapterDOI
Edge Valued Binary Decision Diagrams
TL;DR: A canonical and compact data structure, called Edge Valued Binary Decision Diagrams (EVBDD), for representing and manipulating pseudo Boolean functions (PBF), and an extension of EVBDDs which associates both an additive and a multiplicative weight with the true edges of the function graph.
Proceedings ArticleDOI
Circuit partitioning with logic perturbation
TL;DR: This work proposes an efficient method that is able to preserve a local optimal solution in the graph domain while a different graph, representing the same circuit, is generated.
Journal ArticleDOI
Further improve circuit partitioning using GBAW logic perturbation techniques
TL;DR: This paper presents a powerful multiway partitioning technique which applies efficient logic rewiring techniques for further improvement over already superior hypergraph partitioning results.
Proceedings ArticleDOI
Further improve circuit partitioning using GBAW logic perturbation techniques
TL;DR: A multi-way partitioning framework which can couple any excellent hypergraph partitioner and a noval logic perturbation based technique (GBAW) for further improvement over very excellent partitioning results is presented.
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