Proceedings ArticleDOI
Design and implementation of area efficient, low power AMBA-APB Bridge for SoC
Abhijeet Paunikar,Rohan Gavankar,Nachiket Umarikar,K. Sivasankaran +3 more
- pp 1-6
TLDR
The design of Advanced Peripheral Bus (APB) controller (or APB Bridge) has been presented and UART as an APB slave has been used in the design for data security.Abstract:
In this paper, we present the design of Advanced Peripheral Bus (APB) controller (or APB Bridge). UART as an APB slave has been used in the design. Linear Feedback shift register (LFSR) module has been included in the UART design for data security. We have also compared APB Bridge design compatible with AMBA Specification (Rev 2.0) and APB Bridge design compatible with AMBA 3 APB Specification (v1.0) for power and area constraints have been done. Design of APB Bride with AMBA3 APB save 6% power and 10% area over the one designed with AMBA2 APB.read more
Citations
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Journal ArticleDOI
Design and analysis of dedicated real-time clock for customized microcontroller unit
M.N. A.M. Alias,S. N. Mohyar,Mohd Nazrin Md Isa,Azizi Harun,Asral Bahari Jambek,Sohiful Anuar Zainol Murad +5 more
TL;DR: The basic architecture of RTC, APB standard for interfacing the RTC with AMBA bus, and the result in term of RTL, waveform, and layout will be discussed in this documentation.
Journal ArticleDOI
Design and implementation of AMBA bridge protocol in system on chip design
Wang Hang Suan,Asral Bahari Jambek,Mohd Nazrin Md Isa,Azizi bin Harun,S. N. Mohyar,Zulfiqar Ali Bin Abd. Aziz +5 more
TL;DR: The goal of this paper is to design and implement the AMBA bridge into a SoC design which consists of a processor, RAM, ROM, watchdog and LED module, and the result shown the bridge transfer a correct data from the ROM into the RAM.
Proceedings ArticleDOI
A Low Power APB with an Area Efficient Structure
TL;DR: In this paper , an AMBAAPB (Advanced Microcontroller Bus Architecture-Advance Outer Bus) bridge for the robust positioning of gadget objects is presented, which can be efficient in terms of energy usage as well as space utilization.
Proceedings ArticleDOI
A Low Power APB with an Area Efficient Structure
TL;DR: In this article , an AMBAAPB (Advanced Microcontroller Bus Architecture-Advance Outer Bus) bridge for the robust positioning of gadget objects is presented, which can be efficient in terms of energy usage as well as space utilization.
Proceedings ArticleDOI
UART Controller with FIFO Buffer Function Based on APB Bus
TL;DR: In this paper , a UART communication interface based on APB bus with asynchronous FIFO buffer is proposed, which can be flexibly configured through the AMBA bus to support baud rate modification, transmission bits, configurability of parity mode and other functions.
References
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Book
Verilog HDL: a guide to digital design and synthesis
TL;DR: In this paper, the authors present an overview of the design of Verilog HDLs and its application in computer aided digital design (CADD), including the following: 1. Hierarchical Modeling Concepts.
Proceedings ArticleDOI
FPGA Implementation of 8, 16 and 32 Bit LFSR with Maximum Length Feedback Polynomial Using VHDL
TL;DR: This paper implemented 8, 16 and 32-bit LFSR on FPGA by using VHDL to study the performance and analysis the behavior of randomness, and the simulation problem for long bit L FSR onFPGA is presented.
Proceedings ArticleDOI
The design of high speed UART
J. Norhuzaimin,H.H. Maimun +1 more
TL;DR: The simulated waveforms in this paper have proven the reliability of the VHDL implementation to describe the characteristics and the architecture of the design UART with baud rate generator.
Proceedings ArticleDOI
A new approach to realize UART
Wang Yongcheng,Kefei Song +1 more
TL;DR: In order to connect DSP which has synchronous serial ports to the devices implementing asynchronous communications protocol, a method to implement UART communications based on programmable logic device is proposed in the paper.