Proceedings ArticleDOI
Design and Simulation of UART Serial Communication Module Based on VHDL
Yi-yuan Fang,Xue-jun Chen +1 more
- pp 1-4
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TLDR
The UART implemented with VHDL language can be integrated into the FPGA to achieve compact, stable and reliable data transmission.Abstract:
UART (Universal Asynchronous Receiver Transmitter) is a kind of serial communication protocol; mostly used for short-distance, low speed, low-cost data exchange between computer and peripherals. During the actual industrial production, sometimes we do not need the full functionality of UART, but simply integrate its core part. UART includes three kernel modules which are the baud rate generator, receiver and transmitter. The UART implemented with VHDL language can be integrated into the FPGA to achieve compact, stable and reliable data transmission. It's significant for the design of SOC. The simulation results with Quartus II are completely consistent with the UART protocol.read more
Citations
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Journal ArticleDOI
An FPGA Implementation of On Chip UART Testing with BIST Techniques
P Bala Gopal,K Hari Kishore +1 more
TL;DR: Results indicate that this model eliminates the need for expensive testers and thereby it can reduce the development time and cost.
Proceedings ArticleDOI
VHDL Implementation of UART with Status Register
TL;DR: The paper presents the architecture of UART which indicates, during reception of data, parity error, framing error, overrun error and break error using status register, and the whole design is functionally verified using Xilinx ISE Simulator.
Proceedings ArticleDOI
Design of a 9-bit UART module based on Verilog HDL
TL;DR: This paper presents the design of 9-bit UART modules based on Verilog HDL, which features automatic address identification in the character itself and implemented the VLSI design of the module.
Proceedings ArticleDOI
Optimal implementation of UART-SPI Interface in SoC
TL;DR: The design and implementation of SoC's UART-SPI Interface provides usage for the universal asynchronous receiver/transmitter to serial peripheral interface (SPI) which can be used to communicate to SPI slave devices from a PC with UART port.
Proceedings ArticleDOI
Design and implementation of a BIST embedded high speed RS-422 utilized UART over FPGA
TL;DR: This paper represents designing and implementation of a Universal Asynchronous Receiver Transmitter (UART) with self-testing ability, designed with Verilog HDL language and synthesized on Spartan2 FPGA.
References
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Journal ArticleDOI
Design of a micro-UART for SoC application
TL;DR: The proposed UART is named as micro-UART and it is ideal for system-on-a-chip (SoC) application and the core is usable as an intellectual property.
Journal Article
Design and Simulation of UART Serial Communication Module Based on Verilog-HDL
TL;DR: By using the Verilog-HDL to describe the three kernel functional modules of the Uart, making them as a whole and simulating them with the Modelsim, the results of the simulation are completely consistent with the UART protocol.