Digital charge balance controller with low gate count to improve the transient response of buck converters

TLDR: In this paper, a linear/non-linear digital controller is presented which allows a Buck converter to recover from a load transient event with near-optimal voltage deviation and recovery time.

Abstract: A linear/non-linear digital controller is presented which allows a Buck converter to recover from a load transient event with near-optimal voltage deviation and recovery time. It is demonstrated that near-optimal transient performance can be obtained without information pertaining to the Buck converter's output inductor. The proposed controller can also be extended to applications which require load-line regulation. Unlike previous digital time-optimal controllers, the proposed controller does not require digital multiplier or divider blocks nor does it require two-dimensional look-up tables. Thus, the controller can be implemented with a significantly low gate count allowing for the use of low-cost FPGAs or CPLDs. Furthermore, the proposed controller provides an excellent transient response as it is capable of reacting asynchronously to a load transient event.