FPGA based simple and fast JPEG encryptor

TLDR: FPGA implementation of a novel image encryption algorithm, based on block and symbol scrambling is proposed as a part of JPEG image encoding scheme to meet four major requirements: to provide temporal security, preserve the overall bit rate with negligible overhead, remain complaint with the JPEG file format, and fast and less complex implementation for real time applications.

Abstract: The efficient transmission of images at low bit rate with high security has gained momentum due to recent explosion in networking and multimedia applications. Mixing several existing standard encryption techniques with image encoding tend to change the bit rate greatly. In this paper, FPGA implementation of a novel image encryption algorithm, based on block and symbol scrambling is proposed as a part of JPEG image encoding scheme to meet four major requirements: (1) to provide temporal security, (2) to preserve the overall bit rate with negligible overhead, (3) remain complaint with the JPEG file format, (4) fast and less complex implementation for real time applications. Implementation of the algorithm in an efficient manner with low complexity is a requirement for real time tactical security applications. The algorithm is implemented on STRATIX II and IV FPGAs using only 1 % extra hardware for encryption than that of the basic JPEG. Further, the JPEG implementation without encryption is competitive with other implementations available in literature. The implemented encryption module can be used in the image transmission system for secure image coding and tactical communications.