High-performance DSPs

TLDR: An implementation of GSM enhanced full rate (EFR) codec on the Lucent Technologies' DSP16000 is presented and the original European Telecommunications Standards Institute (ETSI) C code has been restructured to address the issues of MIPS, RAM usage, and processing delay.

Abstract: The processing delay is a serious constraint for speech communication. A one-way end-to-end delay of more than 150 ms can severely degrade the quality of real-time conversations. The components of the total system delay includes the speech frame size, the look ahead, other algorithmic delays, multiplexing delay, processing delay for computation, and transmission delay. At the transcoder rate adaptor unit (TRAU), the only delay that can be manipulated is the processing delay. The TRAUs are generally positioned remote to the base transceiver station (BTS). The channel codec units (CCUs) are located in the BTS. In general, 16 kbit/s traffic channels can be used for full rate speech between the TRAU and BTS. By putting the TRAU remote to the BTS, DSPs for speech coding can be utilized more efficiently to cut system cost. High performance DSPs, such as the Lucent DSP16000, can be used to further cut the cost per speech channel. This article presents an implementation of GSM enhanced full rate (EFR) codec on the Lucent Technologies' DSP16000. The original European Telecommunications Standards Institute (ETSI) C code has been restructured to address the issues of MIPS (million instructions per second), RAM usage, and processing delay. We give a performance overview of vocoder implementations on some existing fixed-point DSPs and discuss the architecture of the DSP16000. Details on how the ETSI C code is restructured are presented. The DSP16210 implementation results are then discussed.