Patent
Method of manufacturing soi wafer
Otsuki Takeshi,Sato Hideki +1 more
TLDR
In this paper, the authors proposed an SOI-wafer manufacturing method whereby a high-quality epitaxial layer can be grown on an SoI layer more surely than in conventional cases.Abstract:
PROBLEM TO BE SOLVED: To provide an SOI-wafer manufacturing method whereby a high-quality epitaxial layer can be grown on an SOI layer more surely than in conventional cases. SOLUTION: The SOI-wafer manufacturing method is the one wherein an SOI layer and an epitaxial layer are formed on an insulator by at least creating a substrate whereon the SOI layer is formed on the insulator, and by growing the epitaxial layer on the SOI layer. After at least creating the substrate wherein the SOI layer is formed on the insulator, and before growing the epitaxial layer, the substrate is subjected to an HF processing. Thereafter, the epitaxial layer is grown on the SOI layer. COPYRIGHT: (C)2008,JPO&INPITread more
Citations
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TL;DR: In this paper, a gas channel plate for a semiconductor process module is described, which includes a heat exchange surface including a plurality of heat exchange structures separated from one another by intervening gaps.
References
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Patent
Manufacture of soi wafer and soi wafer manufactured thereby
TL;DR: In this paper, the authors proposed a method to provide an SOI wafer which has a thick SOI layer having a good uniformity in thickness and an excellent crystallinity, and therefore is useful for a bipolar device and a power device.
Patent
Flattening process method for semiconductor wafer
Endo Akihiko,Morimoto Nobuyuki +1 more
TL;DR: In this article, a flattening method for a semiconductor wafer by which the flatness of the wafer surface is improved in a short time is presented. But the method is limited to the active layer of a silicon wafer.
Patent
Production of thin film epitaxial wafer and thin film epitaxial wafer produced therewith
TL;DR: In this paper, the authors proposed a low-temp. epitaxial growth that enables fewer COP(crystal-originated particles) and good electric properties of a thin-filtered wafer and correspondence to low temp.
Patent
Substrate and its manufacture
TL;DR: In this article, the authors proposed a method to provide an SOI board which has little crystal defect and is provided with a silicon semiconductor layer (SOI layer) of high quality, which is excellent in film thickness uniformity.